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| author | Kuogee Hsieh <[email protected]> | 2021-08-05 20:44:51 +0000 |
|---|---|---|
| committer | Rob Clark <[email protected]> | 2021-08-10 21:48:16 +0000 |
| commit | 4b85d405cfe938ae7ad61656484ae88dee289e3b (patch) | |
| tree | 073aaf03d73c4b8a4fdb82ae0aee4cc1f2558305 /drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c | |
| parent | drm/msm/dp: use dp_ctrl_off_link_stream during PHY compliance test run (diff) | |
| download | kernel-4b85d405cfe938ae7ad61656484ae88dee289e3b.tar.gz kernel-4b85d405cfe938ae7ad61656484ae88dee289e3b.zip | |
drm/msm/dp: reduce link rate if failed at link training 1
Reduce link rate and re start link training if link training 1
failed due to loss of clock recovery done to fix Link Layer
CTS case 4.3.1.7. Also only update voltage and pre-emphasis
swing level after link training started to fix Link Layer CTS
case 4.3.1.6.
Changes in V2:
-- replaced cr_status with link_status[DP_LINK_STATUS_SIZE]
-- replaced dp_ctrl_any_lane_cr_done() with dp_ctrl_colco_recovery_any_ok()
-- replaced dp_ctrl_any_ane_cr_lose() with !drm_dp_clock_recovery_ok()
Changes in V3:
-- return failed if lane_count <= 1
Signed-off-by: Kuogee Hsieh <[email protected]>
Reviewed-by: Stephen Boyd <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
[remove unused cr_status variable]
Signed-off-by: Rob Clark <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mca.c')
0 files changed, 0 insertions, 0 deletions