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| author | Jiawen Wu <[email protected]> | 2023-06-06 09:21:06 +0000 |
|---|---|---|
| committer | Paolo Abeni <[email protected]> | 2023-06-08 11:25:10 +0000 |
| commit | 854cace61387b6f60734d9ec254443a6894c480d (patch) | |
| tree | 4e9e8ea0bf46ccea1640c39145806d6548b5894c /drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c | |
| parent | net: pcs: Add 10GBASE-R mode for Synopsys Designware XPCS (diff) | |
| download | kernel-854cace61387b6f60734d9ec254443a6894c480d.tar.gz kernel-854cace61387b6f60734d9ec254443a6894c480d.zip | |
net: txgbe: Implement phylink pcs
Register MDIO bus for PCS layer to use Synopsys designware XPCS, support
10GBASE-R interface to the controller.
Signed-off-by: Jiawen Wu <[email protected]>
Reviewed-by: Andrew Lunn <[email protected]>
Reviewed-by: Maciej Fijalkowski <[email protected]>
Signed-off-by: Paolo Abeni <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_jpeg.c')
0 files changed, 0 insertions, 0 deletions