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| author | Takashi Iwai <[email protected]> | 2022-07-04 12:14:04 +0000 |
|---|---|---|
| committer | Takashi Iwai <[email protected]> | 2022-07-04 12:14:04 +0000 |
| commit | dd84cfff3cc3b79c9d616f85bd1178df135cbd1a (patch) | |
| tree | cd02e30a78211bed4f1270877b705a079d4bd364 /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | |
| parent | ALSA: usb-audio: Add quirk for Fiero SC-01 (fw v1.0.0) (diff) | |
| parent | ASoC: madera: Fix event generation for rate controls (diff) | |
| download | kernel-dd84cfff3cc3b79c9d616f85bd1178df135cbd1a.tar.gz kernel-dd84cfff3cc3b79c9d616f85bd1178df135cbd1a.zip | |
Merge tag 'asoc-fix-v5.19-rc3' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus
ASoC: Fixes for v5.19
A collection of fixes for v5.19, quite large but nothing major - a good
chunk of it is more stuff that was identified by mixer-test regarding
event generation.
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 15 |
1 files changed, 1 insertions, 14 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c index ea3e8c66211f..b4cf8717f554 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c @@ -193,20 +193,7 @@ static irqreturn_t amdgpu_irq_handler(int irq, void *arg) if (ret == IRQ_HANDLED) pm_runtime_mark_last_busy(dev->dev); - /* For the hardware that cannot enable bif ring for both ras_controller_irq - * and ras_err_evnet_athub_irq ih cookies, the driver has to poll status - * register to check whether the interrupt is triggered or not, and properly - * ack the interrupt if it is there - */ - if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__PCIE_BIF)) { - if (adev->nbio.ras && - adev->nbio.ras->handle_ras_controller_intr_no_bifring) - adev->nbio.ras->handle_ras_controller_intr_no_bifring(adev); - - if (adev->nbio.ras && - adev->nbio.ras->handle_ras_err_event_athub_intr_no_bifring) - adev->nbio.ras->handle_ras_err_event_athub_intr_no_bifring(adev); - } + amdgpu_ras_interrupt_fatal_error_handler(adev); return ret; } |