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authorMonk Liu <[email protected]>2016-11-11 10:25:49 +0000
committerAlex Deucher <[email protected]>2016-11-23 20:08:40 +0000
commit45682886bcd4a7d94a3281460c29a8a5c5438212 (patch)
tree5c13f4cffd83375c1278ab826d4970a58f732476 /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
parentdrm/amdgpu: enable uvd mgcg for Fiji. (diff)
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drm/amdgpu:impl vgt_flush for VI(V5)
when shadowing enabled, tesselation app will trigger vm fault because below three tesselation registers: VGT_TF_RING_SIZE__CI__VI, VGT_HS_OFFCHIP_PARAM__CI__VI, VGT_TF_MEMORY_BASE__CI__VI, need to be programed after vgt-flush. Tesselation picture vm fault disappeared after vgt-flush introduced. v2:implement vgt-flush for CI & SI. v3:move vgt flush inside of cntx_cntrl v4:count vgt flush in frame_size v5:squash in typo fix Signed-off-by: Monk Liu <[email protected]> Reviewed-by: Alex Deucher <[email protected]> Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
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