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authorThomas Zimmermann <[email protected]>2021-07-14 14:22:40 +0000
committerThomas Zimmermann <[email protected]>2021-08-08 18:14:14 +0000
commit0a6dab7d07d25c6d1e6dff0c31bac11ef1803f8a (patch)
tree15f0ee11bf16ce42d1d221b21ee5c4dac3b2becb /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
parentdrm/mgag200: Introduce custom CRTC state (diff)
downloadkernel-0a6dab7d07d25c6d1e6dff0c31bac11ef1803f8a.tar.gz
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drm/mgag200: Compute PLL values during atomic check
PLL setup can fail if the display mode's clock is not supported by any PLL configuration. Compute the PLL values during atomic check, so that atomic commits can fail at the appropriate time. If successful, use the values in the atomic-update phase. Signed-off-by: Thomas Zimmermann <[email protected]> Acked-by: Sam Ravnborg <[email protected]> Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
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