aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
diff options
context:
space:
mode:
authorChunming Zhou <[email protected]>2017-05-09 07:50:22 +0000
committerAlex Deucher <[email protected]>2017-05-24 21:40:35 +0000
commitdf83d1ebc9e304fa3ba4bf79dba76418789a77cf (patch)
tree150b6da48a391edd59e3f74f1da6f948c3fbac51 /drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
parentdrm/amdgpu: remove unsed amdgpu_gem_handle_lockup (v2) (diff)
downloadkernel-df83d1ebc9e304fa3ba4bf79dba76418789a77cf.tar.gz
kernel-df83d1ebc9e304fa3ba4bf79dba76418789a77cf.zip
drm/amdgpu: add sched sync for amdgpu job v2
this is an improvement for previous patch, the sched_sync is to store fence that could be skipped as scheduled, when job is executed, we didn't need pipeline_sync if all fences in sched_sync are signalled, otherwise insert pipeline_sync still. v2: handle error when adding fence to sync failed. Signed-off-by: Chunming Zhou <[email protected]> Reviewed-by: Junwei Zhang <[email protected]> (v1) Reviewed-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 53d0d21ee26d..631a9f77b973 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
@@ -121,6 +121,7 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
{
struct amdgpu_device *adev = ring->adev;
struct amdgpu_ib *ib = &ibs[0];
+ struct dma_fence *tmp;
bool skip_preamble, need_ctx_switch;
unsigned patch_offset = ~0;
struct amdgpu_vm *vm;
@@ -160,8 +161,13 @@ int amdgpu_ib_schedule(struct amdgpu_ring *ring, unsigned num_ibs,
dev_err(adev->dev, "scheduling IB failed (%d).\n", r);
return r;
}
- if (ring->funcs->emit_pipeline_sync && job && job->need_pipeline_sync)
+
+ if (ring->funcs->emit_pipeline_sync && job &&
+ (tmp = amdgpu_sync_get_fence(&job->sched_sync))) {
+ job->need_pipeline_sync = true;
amdgpu_ring_emit_pipeline_sync(ring);
+ dma_fence_put(tmp);
+ }
if (vm) {
r = amdgpu_vm_flush(ring, job);