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authorSamuel Zhang <[email protected]>2025-04-11 08:19:09 +0000
committerAlex Deucher <[email protected]>2025-06-18 16:19:15 +0000
commit2f405eb45c5523aadf6faea1ca465cf3e6ad7866 (patch)
tree0928b342cefd9dbf51e7ffb2d1c70dbd3066a23c /drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
parentdrm/amdgpu: update GPU addresses for SMU and PSP (diff)
downloadkernel-2f405eb45c5523aadf6faea1ca465cf3e6ad7866.tar.gz
kernel-2f405eb45c5523aadf6faea1ca465cf3e6ad7866.zip
drm/amdgpu: enable pdb0 for hibernation on SRIOV
When switching to new GPU index after hibernation and then resume, VRAM offset of each VRAM BO will be changed, and the cached gpu addresses needed to updated. This is to enable pdb0 and switch to use pdb0-based virtual gpu address by default in amdgpu_bo_create_reserved(). since the virtual addresses do not change, this can avoid the need to update all cached gpu addresses all over the codebase. Signed-off-by: Emily Deng <[email protected]> Signed-off-by: Samuel Zhang <[email protected]> Acked-by: Christian König <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
index 80fa29c26e9e..46b2bcbd5025 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gmc.h
@@ -394,6 +394,7 @@ static inline uint64_t amdgpu_gmc_sign_extend(uint64_t addr)
return addr;
}
+bool amdgpu_gmc_is_pdb0_enabled(struct amdgpu_device *adev);
int amdgpu_gmc_pdb0_alloc(struct amdgpu_device *adev);
void amdgpu_gmc_get_pde_for_bo(struct amdgpu_bo *bo, int level,
uint64_t *addr, uint64_t *flags);