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authorJarkko Nikula <[email protected]>2025-04-09 14:03:57 +0000
committerAlexandre Belloni <[email protected]>2025-05-15 09:41:13 +0000
commiteeeec6c5475e914157feab00bdcaed79132e47a2 (patch)
treed888af31b0dc8cfbd14ce884e04842e525146a78 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c
parentLinux 6.15-rc1 (diff)
downloadkernel-eeeec6c5475e914157feab00bdcaed79132e47a2.tar.gz
kernel-eeeec6c5475e914157feab00bdcaed79132e47a2.zip
i3c: mipi-i3c-hci: Allow only relevant INTR_STATUS bit updates
Since MIPI I3C HCI specification version v0.8 INTR_STATUS bits 9:0 are reserved. Version v0.5 has bits 9 and 5:0 in use but not handled by the current driver code and not needed in DMA transfers. PIO transfers with v0.5 would require changes to both core.c: i3c_hci_irq_handler() and pio.c: hci_pio_irq_handler() though. For these reasons don't enable signal updates from INTR_STATUS bits 9:0. It allow to get rid of "unexpected INTR_STATUS" error messages on old v0.5 IP version and is a no-op for later versions starting from v0.8. Signed-off-by: Jarkko Nikula <[email protected]> Reviewed-by: Frank Li <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Alexandre Belloni <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
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