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| author | Pierre Yves MORDRET <[email protected]> | 2018-03-13 16:42:05 +0000 |
|---|---|---|
| committer | Vinod Koul <[email protected]> | 2018-04-04 06:19:36 +0000 |
| commit | 9df3bd5520038225ceb3927021e6ea811c000c5b (patch) | |
| tree | 218fd78c96a1d64503db268c16ce5646f9326921 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |
| parent | dmaengine: stm32-dma: fix max items per transfer (diff) | |
| download | kernel-9df3bd5520038225ceb3927021e6ea811c000c5b.tar.gz kernel-9df3bd5520038225ceb3927021e6ea811c000c5b.zip | |
dmaengine: stm32-dma: properly mask irq bits
A single register of the controller holds the information for four dma
channels.
The functions stm32_dma_irq_status() don't mask the relevant bits after
the shift, thus adjacent channel's status is also reported in the returned
value.
Fixed by masking the value before returning it.
Similarly, the function stm32_dma_irq_clear() don't mask the input value
before shifting it, thus an incorrect input value could disable the
interrupts of adjacent channels.
Fixed by masking the input value before using it.
Signed-off-by: Pierre-Yves MORDRET <[email protected]>
Signed-off-by: Antonio Borneo <[email protected]>
Signed-off-by: Vinod Koul <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
0 files changed, 0 insertions, 0 deletions