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| author | Coly Li <[email protected]> | 2024-10-21 05:04:43 +0000 |
|---|---|---|
| committer | Dave Jiang <[email protected]> | 2024-10-28 17:07:49 +0000 |
| commit | 9474d586819940f00a98dd98015fe456f9b35452 (patch) | |
| tree | 417f3c4449a3b1936edb0dbf0a0d5862e59fd0c0 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |
| parent | cxl/pci: Add sysfs attribute for CXL 1.1 device link status (diff) | |
| download | kernel-9474d586819940f00a98dd98015fe456f9b35452.tar.gz kernel-9474d586819940f00a98dd98015fe456f9b35452.zip | |
cxl: downgrade a warning message to debug level in cxl_probe_component_regs()
In cxl_probe_component_regs() the error message "Couldn't locate the
CXL.cache and CXL.mem capability array header." is potentially a false
positive error condition.
Downgrade the message from error level to debug level by using dev_dbg()
to print the message, and the end users won't worry about the message
anymore.
[djbw/iweiny: Fix up changelog]
Reported-by: Kelvin Shieh <[email protected]>
Signed-off-by: Coly Li <[email protected]>
Cc: Dan Williams <[email protected]>
Cc: Jonathan Cameron <[email protected]>
Cc: Alison Schofield <[email protected]>
Reviewed-by: Dan Williams <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Ira Weiny <[email protected]>
Signed-off-by: Dave Jiang <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
0 files changed, 0 insertions, 0 deletions