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| author | Like Xu <[email protected]> | 2021-04-30 05:22:47 +0000 |
|---|---|---|
| committer | Peter Zijlstra <[email protected]> | 2021-05-18 10:53:47 +0000 |
| commit | 488e13a489e9707a7e81e1991fdd1f20c0f04689 (patch) | |
| tree | 879e930522ad4021a4118c8ff0e9d5ae0d869917 /drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c | |
| parent | perf/x86: Avoid touching LBR_TOS MSR for Arch LBR (diff) | |
| download | kernel-488e13a489e9707a7e81e1991fdd1f20c0f04689.tar.gz kernel-488e13a489e9707a7e81e1991fdd1f20c0f04689.zip | |
perf/x86/lbr: Remove cpuc->lbr_xsave allocation from atomic context
If the kernel is compiled with the CONFIG_LOCKDEP option, the conditional
might_sleep_if() deep in kmem_cache_alloc() will generate the following
trace, and potentially cause a deadlock when another LBR event is added:
[] BUG: sleeping function called from invalid context at include/linux/sched/mm.h:196
[] Call Trace:
[] kmem_cache_alloc+0x36/0x250
[] intel_pmu_lbr_add+0x152/0x170
[] x86_pmu_add+0x83/0xd0
Make it symmetric with the release_lbr_buffers() call and mirror the
existing DS buffers.
Fixes: c085fb8774 ("perf/x86/intel/lbr: Support XSAVES for arch LBR read")
Signed-off-by: Like Xu <[email protected]>
[peterz: simplified]
Signed-off-by: Peter Zijlstra (Intel) <[email protected]>
Tested-by: Kan Liang <[email protected]>
Link: https://lkml.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gem.c')
0 files changed, 0 insertions, 0 deletions