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authorGraham Sider <[email protected]>2023-02-06 19:04:42 +0000
committerAlex Deucher <[email protected]>2023-06-09 13:59:03 +0000
commit895797d9193b38e759bc01268a8e3887e521f682 (patch)
tree73797e8e8d06b8cbe881acb0ecd593d5ff85a805 /drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
parentdrm/amdgpu: Use legacy TLB flush for gfx943 (diff)
downloadkernel-895797d9193b38e759bc01268a8e3887e521f682.tar.gz
kernel-895797d9193b38e759bc01268a8e3887e521f682.zip
drm/amdgpu/bu: Add use_mtype_cc_wa module param
By default, set use_mtype_cc_wa to 1 to set PTE coherence flag MTYPE_CC instead of MTYPE_RW by default. This is required for the time being to mitigate a bug causing XCCs to hit stale data due to TCC marking fully dirty lines as exclusive. Signed-off-by: Graham Sider <[email protected]> Reviewed-by: Joseph Greathouse <[email protected]> Reviewed-by: Felix Kuehling <[email protected]> Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c7
1 files changed, 7 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index da4e50aef95a..8bc37826a99f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -823,6 +823,13 @@ module_param_named(no_queue_eviction_on_vm_fault, amdgpu_no_queue_eviction_on_vm
#endif
/**
+ * DOC: use_mtype_cc_wa (bool)
+ */
+bool amdgpu_use_mtype_cc_wa = true;
+MODULE_PARM_DESC(use_mtype_cc_wa, "Use MTYPE_CC workaround (0 = use MTYPE_RW where applicable, 1 = use MTYPE_CC where applicable (default))");
+module_param_named(use_mtype_cc_wa, amdgpu_use_mtype_cc_wa, bool, 0444);
+
+/**
* DOC: pcie_p2p (bool)
* Enable PCIe P2P (requires large-BAR). Default value: true (on)
*/