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| author | Yao Wang1 <[email protected]> | 2021-03-09 09:51:58 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-03-24 03:33:36 +0000 |
| commit | 1c5ea40c2ad28f32a8d3784b81b22ec8c4729abe (patch) | |
| tree | d94e4984e9aaa6bf1dae34bbc694fde0d5bb2434 /drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c | |
| parent | drm/amd/display: fix dcn3+ bw validation soc param update sequence (diff) | |
| download | kernel-1c5ea40c2ad28f32a8d3784b81b22ec8c4729abe.tar.gz kernel-1c5ea40c2ad28f32a8d3784b81b22ec8c4729abe.zip | |
drm/amd/display: add a func to disable accelerated mode
[Why]
When driver disabled, we driver force the YCbCr420 to RGB,
which means some register will be changed, such as
RDPCS_PHY_DP_MPLLB_TX_CLK_DIV changed from 1 to 0
When driver re-enabled, OS will Set Mode YCbCr420 again,
which means the register RDPCS_PHY_DP_MPLLB_TX_CLK_DIV
should to be 1 again, but dmub fw can’t update the
register to 1 due to the mpll is not off
[How]
Adds an interface to disable accelerated mode bit,
which allows DM to decide to call during driver
disable/unload scenarios.
Tested-by: Daniel Wheeler <[email protected]>
Signed-off-by: Yao Wang1 <[email protected]>
Reviewed-by: Anthony Koo <[email protected]>
Acked-by: Solomon Chiu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c')
0 files changed, 0 insertions, 0 deletions