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authorArunpravin Paneer Selvam <[email protected]>2025-07-16 07:51:24 +0000
committerChristian König <[email protected]>2025-07-16 10:50:32 +0000
commit95a16160ca1d75c66bf7a1c5e0bcaffb18e7c7fc (patch)
tree7c040cd08d2548c359b9494f617d4a50deee8a41 /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
parentdrm/panfrost: Fix scheduler workqueue bug (diff)
downloadkernel-95a16160ca1d75c66bf7a1c5e0bcaffb18e7c7fc.tar.gz
kernel-95a16160ca1d75c66bf7a1c5e0bcaffb18e7c7fc.zip
drm/amdgpu: Reset the clear flag in buddy during resume
- Added a handler in DRM buddy manager to reset the cleared flag for the blocks in the freelist. - This is necessary because, upon resuming, the VRAM becomes cluttered with BIOS data, yet the VRAM backend manager believes that everything has been cleared. v2: - Add lock before accessing drm_buddy_clear_reset_blocks()(Matthew Auld) - Force merge the two dirty blocks.(Matthew Auld) - Add a new unit test case for this issue.(Matthew Auld) - Having this function being able to flip the state either way would be good. (Matthew Brost) v3(Matthew Auld): - Do merge step first to avoid the use of extra reset flag. Signed-off-by: Arunpravin Paneer Selvam <[email protected]> Suggested-by: Christian König <[email protected]> Acked-by: Christian König <[email protected]> Reviewed-by: Matthew Auld <[email protected]> Cc: [email protected] Fixes: a68c7eaa7a8f ("drm/amdgpu: Enable clear page functionality") Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/3812 Signed-off-by: Christian König <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index e1bab6a96cb6..4ecacbcb66bb 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -5193,6 +5193,8 @@ exit:
dev->dev->power.disable_depth--;
#endif
}
+
+ amdgpu_vram_mgr_clear_reset_blocks(adev);
adev->in_suspend = false;
if (amdgpu_acpi_smart_shift_update(dev, AMDGPU_SS_DEV_D0))