diff options
| author | James Zhu <[email protected]> | 2022-01-20 03:32:41 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2023-06-09 13:40:46 +0000 |
| commit | 81283fee15ea6afb1e32defb369c3b96d2d6765c (patch) | |
| tree | d77f8d2701fbf3f747ed0cc8624d4fd26b07d67c /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | drm/amdgpu: Use the correct API to read register (diff) | |
| download | kernel-81283fee15ea6afb1e32defb369c3b96d2d6765c.tar.gz kernel-81283fee15ea6afb1e32defb369c3b96d2d6765c.zip | |
drm/amdgpu/: add more macro to support offset variant
Add more macro to support offset variant and
simplify macro SOC15_WAIT_ON_RREG.
Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Leo Liu <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index f432064a0535..82a3d0ff6560 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -6081,3 +6081,31 @@ bool amdgpu_device_has_display_hardware(struct amdgpu_device *adev) return true; } } + +uint32_t amdgpu_device_wait_on_rreg(struct amdgpu_device *adev, + uint32_t inst, uint32_t reg_addr, char reg_name[], + uint32_t expected_value, uint32_t mask) +{ + uint32_t ret = 0; + uint32_t old_ = 0; + uint32_t tmp_ = RREG32(reg_addr); + uint32_t loop = adev->usec_timeout; + + while ((tmp_ & (mask)) != (expected_value)) { + if (old_ != tmp_) { + loop = adev->usec_timeout; + old_ = tmp_; + } else + udelay(1); + tmp_ = RREG32(reg_addr); + loop--; + if (!loop) { + DRM_WARN("Register(%d) [%s] failed to reach value 0x%08x != 0x%08xn", + inst, reg_name, (uint32_t)expected_value, + (uint32_t)(tmp_ & (mask))); + ret = -ETIMEDOUT; + break; + } + } + return ret; +} |