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| author | Jaehyun Chung <[email protected]> | 2019-08-19 20:45:05 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-09-13 23:03:06 +0000 |
| commit | 785908cf19c9eb4803f6bf9c0a7447dc3661d5c3 (patch) | |
| tree | d8fe2db7d24c43add6b869ee2d005952a46a3f4c /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | drm/amd/display: remove hw access from dc_destroy (diff) | |
| download | kernel-785908cf19c9eb4803f6bf9c0a7447dc3661d5c3.tar.gz kernel-785908cf19c9eb4803f6bf9c0a7447dc3661d5c3.zip | |
drm/amd/display: OTC underflow fix
[Why] Underflow occurs on some display setups(repro'd on 3x4K HDR) on boot,
mode set, and hot-plugs with. Underflow occurs because mem clk
is not set high after disabling pstate switching. This behaviour occurs
because some calculations assumed displays were synchronized.
[How] Add a condition to check if timing sync is disabled so that
synchronized vblank can be set to false.
Signed-off-by: Jaehyun Chung <[email protected]>
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Bhawanpreet Lakha <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
0 files changed, 0 insertions, 0 deletions