diff options
| author | Yunxiang Li <[email protected]> | 2024-04-26 03:15:28 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2024-05-02 19:44:02 +0000 |
| commit | 4752cac300fec50530aab69788f48b62c35aa627 (patch) | |
| tree | c77ebc229847cf82d7a1c025bb5d9b45d1a4d413 /drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | |
| parent | drm/amd/amdxcp: Use unique name for partition dev (diff) | |
| download | kernel-4752cac300fec50530aab69788f48b62c35aa627.tar.gz kernel-4752cac300fec50530aab69788f48b62c35aa627.zip | |
drm/amdgpu: Move ras resume into SRIOV function
This is part of the reset, move it into the reset function.
Signed-off-by: Yunxiang Li <[email protected]>
Reviewed-by: Emily Deng <[email protected]>
Reviewed-by: Zhigang Luo <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_device.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_device.c | 12 |
1 files changed, 5 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c index b23645f23a2e..e91ac50a3c8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c @@ -5123,6 +5123,11 @@ static int amdgpu_device_reset_sriov(struct amdgpu_device *adev, amdgpu_amdkfd_post_reset(adev); amdgpu_virt_release_full_gpu(adev, true); + /* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras during reset */ + if (amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 2) || + amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) || + amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3)) + amdgpu_ras_resume(adev); return 0; } @@ -5829,13 +5834,6 @@ retry: /* Rest of adevs pre asic reset from XGMI hive. */ } if (r) adev->asic_reset_res = r; - - /* Aldebaran and gfx_11_0_3 support ras in SRIOV, so need resume ras during reset */ - if (amdgpu_ip_version(adev, GC_HWIP, 0) == - IP_VERSION(9, 4, 2) || - amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(9, 4, 3) || - amdgpu_ip_version(adev, GC_HWIP, 0) == IP_VERSION(11, 0, 3)) - amdgpu_ras_resume(adev); } else { r = amdgpu_do_asic_reset(device_list_handle, reset_context); if (r && r == -EAGAIN) |