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| author | Christian Marangi <[email protected]> | 2023-10-25 09:34:27 +0000 |
|---|---|---|
| committer | Viresh Kumar <[email protected]> | 2023-10-25 10:21:10 +0000 |
| commit | 4a3754f73ef48518a98c3c3a5e0edb9b605740cf (patch) | |
| tree | fd5bdd22bd4306b4c4bee0c297091d7794d86429 /drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c | |
| parent | cpufreq: qcom-nvmem: also accept operating-points-v2-krait-cpu (diff) | |
| download | kernel-4a3754f73ef48518a98c3c3a5e0edb9b605740cf.tar.gz kernel-4a3754f73ef48518a98c3c3a5e0edb9b605740cf.zip | |
cpufreq: qcom-nvmem: add support for IPQ8064
IPQ8064 comes in 3 families:
* IPQ8062 up to 1.0GHz
* IPQ8064/IPQ8066/IPQ8068 up to 1.4GHz
* IPQ8065/IPQ8069 up to 1.7Ghz
So, in order to be able to support one OPP table, add support for
IPQ8064 family based of SMEM SoC ID-s and correctly set the version so
opp-supported-hw can be correctly used.
Bit are set with the following logic:
* IPQ8062 BIT 0
* IPQ8064/IPQ8066/IPQ8068 BIT 1
* IPQ8065/IPQ8069 BIT 2
speed is never fused, only pvs values are fused.
IPQ806x SoC doesn't have pvs_version so we drop and we use the new
pattern:
opp-microvolt-speed0-pvs<PSV_VALUE>
Example:
- for ipq8062 psv2
opp-microvolt-speed0-pvs2 = < 925000 878750 971250>
Fixes: a8811ec764f9 ("cpufreq: qcom: Add support for krait based socs")
Signed-off-by: Christian Marangi <[email protected]>
[ Viresh: Fixed rebase conflict. ]
Signed-off-by: Viresh Kumar <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_debugfs.c')
0 files changed, 0 insertions, 0 deletions