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| author | Alex Deucher <[email protected]> | 2015-11-24 22:43:42 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2015-12-02 20:54:26 +0000 |
| commit | ccba7691a580a0967f60a512473ce699b9edac0d (patch) | |
| tree | 6a86aee8f3d2c4267cd9bb37549322d259c50b7b /drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | |
| parent | drm/amd: add new gfx8 register definitions for EDC (diff) | |
| download | kernel-ccba7691a580a0967f60a512473ce699b9edac0d.tar.gz kernel-ccba7691a580a0967f60a512473ce699b9edac0d.zip | |
drm/amdgpu: add EDC support for CZ (v3)
This adds EDC support for CZ.
EDC = Error Correction and Detection
This code properly initializes the EDC hardware and
resets the error counts. This is done in late_init
since it requires the IB pool which is not initialized
during hw_init.
v2: fix the IB size as noted by Felix, fix shader pgm
register programming
v3: use the IB for the shaders as suggested by Christian
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c')
0 files changed, 0 insertions, 0 deletions