diff options
| author | Claudiu Beznea <[email protected]> | 2023-09-29 05:38:55 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2023-10-05 11:45:22 +0000 |
| commit | 97c1c4ccda76d2919775d748cf223637cf0e82ae (patch) | |
| tree | 47ce2996eefeb102085e5a78d4ed9431764f0e20 /drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c | |
| parent | clk: renesas: rzg2l: Add support for RZ/G3S PLL (diff) | |
| download | kernel-97c1c4ccda76d2919775d748cf223637cf0e82ae.tar.gz kernel-97c1c4ccda76d2919775d748cf223637cf0e82ae.zip | |
clk: renesas: rzg2l: Add struct clk_hw_data
Add clk_hw_data struct that keeps the core part of the clock data.
sd_hw_data embeds a member of type struct clk_hw_data along with other
members (in the next commits). This commit prepares the field for
refactoring the SD MUX clock driver.
Signed-off-by: Claudiu Beznea <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c')
0 files changed, 0 insertions, 0 deletions