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| author | Thierry Reding <[email protected]> | 2019-01-25 10:00:57 +0000 |
|---|---|---|
| committer | Thierry Reding <[email protected]> | 2019-02-07 17:29:01 +0000 |
| commit | 6c2b3881d0df85fed7e3f43dcc9cbc3e5124bc12 (patch) | |
| tree | bc3e591335d308338cc22e0fefa4bd0cf9577d32 /drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | |
| parent | drm/tegra: vic: Support stream ID register programming (diff) | |
| download | kernel-6c2b3881d0df85fed7e3f43dcc9cbc3e5124bc12.tar.gz kernel-6c2b3881d0df85fed7e3f43dcc9cbc3e5124bc12.zip | |
dt-bindings: display: tegra: Support SOR crossbar configuration
The SOR has a crossbar that can map each lane of the SOR to each of the
SOR pads. The mapping is usually the same across designs for a specific
SoC generation, but every now and then there's a design that doesn't.
Allow the crossbar configuration to be specified in device tree to make
it possible to support these designs.
Signed-off-by: Thierry Reding <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c')
0 files changed, 0 insertions, 0 deletions