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| author | Imre Deak <[email protected]> | 2024-01-29 17:55:32 +0000 |
|---|---|---|
| committer | Imre Deak <[email protected]> | 2024-04-10 16:27:23 +0000 |
| commit | 7e3025c6e7bd067d0a6be8e102b6182a04f5c5d6 (patch) | |
| tree | 63002bb5eca10e070ea44fee16d4117d9a12a354 /drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c | |
| parent | drm/i915/adlp+: Add DSC early pixel count scaling WA (Wa_1409098942) (diff) | |
| download | kernel-7e3025c6e7bd067d0a6be8e102b6182a04f5c5d6.tar.gz kernel-7e3025c6e7bd067d0a6be8e102b6182a04f5c5d6.zip | |
drm/i915/mtl+: Disable DP/DSC SF insertion at EOL WA
Disable the workaround inserting an SF symbol between the last DSC EOC
symbol and the subsequent BS symbol. The WA is enabled by default -
based on the register's reset value - and Bspec requires disabling it
explicitly. Bspec doesn't provide an actual WA ID for this.
Bspec: 50054, 65448, 68849
Reviewed-by: Ankit Nautiyal <[email protected]>
Signed-off-by: Imre Deak <[email protected]>
Link: https://patchwork.freedesktop.org/patch/msgid/[email protected]
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_atomfirmware.c')
0 files changed, 0 insertions, 0 deletions