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| author | James Zhu <[email protected]> | 2019-04-05 19:31:47 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2019-05-24 17:20:50 +0000 |
| commit | 5326ad54c5ef01a828cf5a942f6fdbf204ef7d3f (patch) | |
| tree | 95b5e837d320db447710126e301c96638a813c52 /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | drm/amdgpu: add EDC counter register (diff) | |
| download | kernel-5326ad54c5ef01a828cf5a942f6fdbf204ef7d3f.tar.gz kernel-5326ad54c5ef01a828cf5a942f6fdbf204ef7d3f.zip | |
drm/amdgpu: add gfx9 gpr EDC workaround when RAS is enabled
When RAS is enabled, initializes the VGPRs/LDS/SGPRs and
resets EDC error counts. This is done in late_init, before
RAS TA GFX enable.
Signed-off-by: James Zhu <[email protected]>
Reviewed-by: Alex Deucher <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
0 files changed, 0 insertions, 0 deletions