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| author | Alex Deucher <[email protected]> | 2021-10-04 19:19:10 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2021-10-04 19:23:01 +0000 |
| commit | 1d789535a03679e5ce0b56a0d32a5e44596dfcdb (patch) | |
| tree | ccc2b1827bb7efc4b939f56b49fc4bb7236d100b /drivers/gpu/drm/amd/amdgpu/amdgpu.h | |
| parent | drm/amdgpu: set CHIP_IP_DISCOVERY as the asic type by default (diff) | |
| download | kernel-1d789535a03679e5ce0b56a0d32a5e44596dfcdb.tar.gz kernel-1d789535a03679e5ce0b56a0d32a5e44596dfcdb.zip | |
drm/amdgpu: convert IP version array to include instances
Allow us to query instances versions more cleanly.
Instancing support is not consistent unfortunately. SDMA is a
good example. Sienna cichlid has 4 total SDMA instances, each
enumerated separately (HWIDs 42, 43, 68, 69). Arcturus has 8
total SDMA instances, but they are enumerated as multiple
instances of the same HWIDs (4x HWID 42, 4x HWID 43). UMC
is another example. On most chips there are multiple
instances with the same HWID. This allows us to support both
forms.
v2: rebase
v3: clarify instancing support
Reviewed-by: Christian König <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu.h')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h index b153c3740307..f4bceb2624fb 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h @@ -1096,7 +1096,7 @@ struct amdgpu_device { struct pci_saved_state *pci_state; struct amdgpu_reset_control *reset_cntl; - uint32_t ip_versions[HW_ID_MAX]; + uint32_t ip_versions[HW_ID_MAX][HWIP_MAX_INSTANCE]; }; static inline struct amdgpu_device *drm_to_adev(struct drm_device *ddev) |