fix(driver): sync specific drivers from rpi upstreamlinux-6.18.y

2 files changed, 170 insertions, 141 deletions

diff --git a/drivers/gpio/gpio-brcmstb.c b/drivers/gpio/gpio-brcmstb.c
index db3f079fe695..a078de2b807d 100644
--- a/drivers/gpio/gpio-brcmstb.c
+++ b/drivers/gpio/gpio-brcmstb.c
@@ -24,16 +24,16 @@ enum gio_reg_index {
 	NUMBER_OF_GIO_REGISTERS
 };
 
-#define GIO_BANK_SIZE           (NUMBER_OF_GIO_REGISTERS * sizeof(u32))
-#define GIO_BANK_OFF(bank, off)	(((bank) * GIO_BANK_SIZE) + (off * sizeof(u32)))
-#define GIO_ODEN(bank)          GIO_BANK_OFF(bank, GIO_REG_ODEN)
-#define GIO_DATA(bank)          GIO_BANK_OFF(bank, GIO_REG_DATA)
-#define GIO_IODIR(bank)         GIO_BANK_OFF(bank, GIO_REG_IODIR)
-#define GIO_EC(bank)            GIO_BANK_OFF(bank, GIO_REG_EC)
-#define GIO_EI(bank)            GIO_BANK_OFF(bank, GIO_REG_EI)
-#define GIO_MASK(bank)          GIO_BANK_OFF(bank, GIO_REG_MASK)
-#define GIO_LEVEL(bank)         GIO_BANK_OFF(bank, GIO_REG_LEVEL)
-#define GIO_STAT(bank)          GIO_BANK_OFF(bank, GIO_REG_STAT)
+#define GIO_BANK_SIZE (NUMBER_OF_GIO_REGISTERS * sizeof(u32))
+#define GIO_BANK_OFF(bank, off) (((bank) * GIO_BANK_SIZE) + (off * sizeof(u32)))
+#define GIO_ODEN(bank) GIO_BANK_OFF(bank, GIO_REG_ODEN)
+#define GIO_DATA(bank) GIO_BANK_OFF(bank, GIO_REG_DATA)
+#define GIO_IODIR(bank) GIO_BANK_OFF(bank, GIO_REG_IODIR)
+#define GIO_EC(bank) GIO_BANK_OFF(bank, GIO_REG_EC)
+#define GIO_EI(bank) GIO_BANK_OFF(bank, GIO_REG_EI)
+#define GIO_MASK(bank) GIO_BANK_OFF(bank, GIO_REG_MASK)
+#define GIO_LEVEL(bank) GIO_BANK_OFF(bank, GIO_REG_LEVEL)
+#define GIO_STAT(bank) GIO_BANK_OFF(bank, GIO_REG_STAT)
 
 struct brcmstb_gpio_bank {
 	struct list_head node;
@@ -56,10 +56,10 @@ struct brcmstb_gpio_priv {
 	int parent_wake_irq;
 };
 
-#define MAX_GPIO_PER_BANK       32
-#define GPIO_BANK(gpio)         ((gpio) >> 5)
+#define MAX_GPIO_PER_BANK 32
+#define GPIO_BANK(gpio) ((gpio) >> 5)
 /* assumes MAX_GPIO_PER_BANK is a multiple of 2 */
-#define GPIO_BIT(gpio)          ((gpio) & (MAX_GPIO_PER_BANK - 1))
+#define GPIO_BIT(gpio) ((gpio) & (MAX_GPIO_PER_BANK - 1))
 
 static inline struct brcmstb_gpio_priv *
 brcmstb_gpio_gc_to_priv(struct gpio_chip *gc)
@@ -73,8 +73,10 @@ __brcmstb_gpio_get_active_irqs(struct brcmstb_gpio_bank *bank)
 {
 	void __iomem *reg_base = bank->parent_priv->reg_base;
 
-	return gpio_generic_read_reg(&bank->chip, reg_base + GIO_STAT(bank->id)) &
-	       gpio_generic_read_reg(&bank->chip, reg_base + GIO_MASK(bank->id));
+	return gpio_generic_read_reg(&bank->chip,
+				     reg_base + GIO_STAT(bank->id)) &
+	       gpio_generic_read_reg(&bank->chip,
+				     reg_base + GIO_MASK(bank->id));
 }
 
 static unsigned long
@@ -96,7 +98,7 @@ static int brcmstb_gpio_hwirq_to_offset(irq_hw_number_t hwirq,
 }
 
 static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
-		unsigned int hwirq, bool enable)
+				   unsigned int hwirq, bool enable)
 {
 	struct brcmstb_gpio_priv *priv = bank->parent_priv;
 	u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(hwirq, bank));
@@ -110,8 +112,8 @@ static void brcmstb_gpio_set_imask(struct brcmstb_gpio_bank *bank,
 		imask |= mask;
 	else
 		imask &= ~mask;
-	gpio_generic_write_reg(&bank->chip,
-			       priv->reg_base + GIO_MASK(bank->id), imask);
+	gpio_generic_write_reg(&bank->chip, priv->reg_base + GIO_MASK(bank->id),
+			       imask);
 }
 
 static int brcmstb_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
@@ -150,8 +152,8 @@ static void brcmstb_gpio_irq_ack(struct irq_data *d)
 	struct brcmstb_gpio_priv *priv = bank->parent_priv;
 	u32 mask = BIT(brcmstb_gpio_hwirq_to_offset(d->hwirq, bank));
 
-	gpio_generic_write_reg(&bank->chip,
-			       priv->reg_base + GIO_STAT(bank->id), mask);
+	gpio_generic_write_reg(&bank->chip, priv->reg_base + GIO_STAT(bank->id),
+			       mask);
 }
 
 static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
@@ -187,7 +189,7 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 		break;
 	case IRQ_TYPE_EDGE_BOTH:
 		level = 0;
-		edge_config = 0;  /* don't care, but want known value */
+		edge_config = 0; /* don't care, but want known value */
 		edge_insensitive = mask;
 		break;
 	default:
@@ -196,18 +198,20 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 
 	guard(gpio_generic_lock_irqsave)(&bank->chip);
 
-	iedge_config = gpio_generic_read_reg(&bank->chip,
-				priv->reg_base + GIO_EC(bank->id)) & ~mask;
-	iedge_insensitive = gpio_generic_read_reg(&bank->chip,
-				priv->reg_base + GIO_EI(bank->id)) & ~mask;
+	iedge_config = gpio_generic_read_reg(
+			       &bank->chip, priv->reg_base + GIO_EC(bank->id)) &
+		       ~mask;
+	iedge_insensitive =
+		gpio_generic_read_reg(&bank->chip,
+				      priv->reg_base + GIO_EI(bank->id)) &
+		~mask;
 	ilevel = gpio_generic_read_reg(&bank->chip,
-				priv->reg_base + GIO_LEVEL(bank->id)) & ~mask;
+				       priv->reg_base + GIO_LEVEL(bank->id)) &
+		 ~mask;
 
-	gpio_generic_write_reg(&bank->chip,
-			       priv->reg_base + GIO_EC(bank->id),
+	gpio_generic_write_reg(&bank->chip, priv->reg_base + GIO_EC(bank->id),
 			       iedge_config | edge_config);
-	gpio_generic_write_reg(&bank->chip,
-			       priv->reg_base + GIO_EI(bank->id),
+	gpio_generic_write_reg(&bank->chip, priv->reg_base + GIO_EI(bank->id),
 			       iedge_insensitive | edge_insensitive);
 	gpio_generic_write_reg(&bank->chip,
 			       priv->reg_base + GIO_LEVEL(bank->id),
@@ -217,7 +221,7 @@ static int brcmstb_gpio_irq_set_type(struct irq_data *d, unsigned int type)
 }
 
 static int brcmstb_gpio_priv_set_wake(struct brcmstb_gpio_priv *priv,
-		unsigned int enable)
+				      unsigned int enable)
 {
 	int ret = 0;
 
@@ -273,9 +277,10 @@ static void brcmstb_gpio_irq_bank_handler(struct brcmstb_gpio_bank *bank)
 
 		for_each_set_bit(offset, &status, 32) {
 			if (offset >= bank->width)
-				dev_warn(&priv->pdev->dev,
-					 "IRQ for invalid GPIO (bank=%d, offset=%d)\n",
-					 bank->id, offset);
+				dev_warn(
+					&priv->pdev->dev,
+					"IRQ for invalid GPIO (bank=%d, offset=%d)\n",
+					bank->id, offset);
 			generic_handle_domain_irq(domain, hwbase + offset);
 		}
 	}
@@ -297,8 +302,9 @@ static void brcmstb_gpio_irq_handler(struct irq_desc *desc)
 	chained_irq_exit(chip, desc);
 }
 
-static struct brcmstb_gpio_bank *brcmstb_gpio_hwirq_to_bank(
-		struct brcmstb_gpio_priv *priv, irq_hw_number_t hwirq)
+static struct brcmstb_gpio_bank *
+brcmstb_gpio_hwirq_to_bank(struct brcmstb_gpio_priv *priv,
+			   irq_hw_number_t hwirq)
 {
 	struct brcmstb_gpio_bank *bank;
 	int i = 0;
@@ -319,9 +325,8 @@ static struct brcmstb_gpio_bank *brcmstb_gpio_hwirq_to_bank(
 static struct lock_class_key brcmstb_gpio_irq_lock_class;
 static struct lock_class_key brcmstb_gpio_irq_request_class;
 
-
 static int brcmstb_gpio_irq_map(struct irq_domain *d, unsigned int irq,
-		irq_hw_number_t hwirq)
+				irq_hw_number_t hwirq)
 {
 	struct brcmstb_gpio_priv *priv = d->host_data;
 	struct brcmstb_gpio_bank *bank =
@@ -332,8 +337,8 @@ static int brcmstb_gpio_irq_map(struct irq_domain *d, unsigned int irq,
 	if (!bank)
 		return -EINVAL;
 
-	dev_dbg(&pdev->dev, "Mapping irq %d for gpio line %d (bank %d)\n",
-		irq, (int)hwirq, bank->id);
+	dev_dbg(&pdev->dev, "Mapping irq %d for gpio line %d (bank %d)\n", irq,
+		(int)hwirq, bank->id);
 	ret = irq_set_chip_data(irq, &bank->chip.gc);
 	if (ret < 0)
 		return ret;
@@ -358,15 +363,17 @@ static const struct irq_domain_ops brcmstb_gpio_irq_domain_ops = {
 
 /* Make sure that the number of banks matches up between properties */
 static int brcmstb_gpio_sanity_check_banks(struct device *dev,
-		struct device_node *np, struct resource *res)
+					   struct device_node *np,
+					   struct resource *res)
 {
 	int res_num_banks = resource_size(res) / GIO_BANK_SIZE;
 	int num_banks =
 		of_property_count_u32_elems(np, "brcm,gpio-bank-widths");
 
 	if (res_num_banks != num_banks) {
-		dev_err(dev, "Mismatch in banks: res had %d, bank-widths had %d\n",
-				res_num_banks, num_banks);
+		dev_err(dev,
+			"Mismatch in banks: res had %d, bank-widths had %d\n",
+			res_num_banks, num_banks);
 		return -EINVAL;
 	} else {
 		return 0;
@@ -400,7 +407,8 @@ static void brcmstb_gpio_remove(struct platform_device *pdev)
 }
 
 static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
-		const struct of_phandle_args *gpiospec, u32 *flags)
+				 const struct of_phandle_args *gpiospec,
+				 u32 *flags)
 {
 	struct brcmstb_gpio_priv *priv = brcmstb_gpio_gc_to_priv(gc);
 	struct brcmstb_gpio_bank *bank = gpiochip_get_data(gc);
@@ -419,7 +427,8 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
 		return -EINVAL;
 
 	if (unlikely(offset >= bank->width)) {
-		dev_warn_ratelimited(&priv->pdev->dev,
+		dev_warn_ratelimited(
+			&priv->pdev->dev,
 			"Received request for invalid GPIO offset %d\n",
 			gpiospec->args[0]);
 	}
@@ -432,14 +441,15 @@ static int brcmstb_gpio_of_xlate(struct gpio_chip *gc,
 
 /* priv->parent_irq and priv->num_gpios must be set before calling */
 static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
-		struct brcmstb_gpio_priv *priv)
+				  struct brcmstb_gpio_priv *priv)
 {
 	struct device *dev = &pdev->dev;
 	struct device_node *np = dev->of_node;
 	int err;
 
-	priv->irq_domain = irq_domain_create_linear(dev_fwnode(dev), priv->num_gpios,
-						    &brcmstb_gpio_irq_domain_ops, priv);
+	priv->irq_domain =
+		irq_domain_create_linear(dev_fwnode(dev), priv->num_gpios,
+					 &brcmstb_gpio_irq_domain_ops, priv);
 	if (!priv->irq_domain) {
 		dev_err(dev, "Couldn't allocate IRQ domain\n");
 		return -ENXIO;
@@ -449,7 +459,8 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
 		priv->parent_wake_irq = platform_get_irq(pdev, 1);
 		if (priv->parent_wake_irq < 0) {
 			priv->parent_wake_irq = 0;
-			dev_warn(dev,
+			dev_warn(
+				dev,
 				"Couldn't get wake IRQ - GPIOs will not be able to wake from sleep");
 		} else {
 			/*
@@ -460,8 +471,8 @@ static int brcmstb_gpio_irq_setup(struct platform_device *pdev,
 			device_wakeup_enable(dev);
 			err = devm_request_irq(dev, priv->parent_wake_irq,
 					       brcmstb_gpio_wake_irq_handler,
-					       IRQF_SHARED,
-					       "brcmstb-gpio-wake", priv);
+					       IRQF_SHARED, "brcmstb-gpio-wake",
+					       priv);
 
 			if (err < 0) {
 				dev_err(dev, "Couldn't request wake IRQ");
@@ -498,8 +509,9 @@ static void brcmstb_gpio_bank_save(struct brcmstb_gpio_priv *priv,
 	unsigned int i;
 
 	for (i = 0; i < GIO_REG_STAT; i++)
-		bank->saved_regs[i] = gpio_generic_read_reg(&bank->chip,
-					priv->reg_base + GIO_BANK_OFF(bank->id, i));
+		bank->saved_regs[i] = gpio_generic_read_reg(
+			&bank->chip,
+			priv->reg_base + GIO_BANK_OFF(bank->id, i));
 }
 
 static void brcmstb_gpio_quiesce(struct device *dev, bool save)
@@ -540,9 +552,9 @@ static void brcmstb_gpio_bank_restore(struct brcmstb_gpio_priv *priv,
 	unsigned int i;
 
 	for (i = 0; i < GIO_REG_STAT; i++)
-		gpio_generic_write_reg(&bank->chip,
-				       priv->reg_base + GIO_BANK_OFF(bank->id, i),
-				       bank->saved_regs[i]);
+		gpio_generic_write_reg(
+			&bank->chip, priv->reg_base + GIO_BANK_OFF(bank->id, i),
+			bank->saved_regs[i]);
 }
 
 static int brcmstb_gpio_suspend(struct device *dev)
@@ -573,12 +585,12 @@ static int brcmstb_gpio_resume(struct device *dev)
 }
 
 #else
-#define brcmstb_gpio_suspend	NULL
-#define brcmstb_gpio_resume	NULL
+#define brcmstb_gpio_suspend NULL
+#define brcmstb_gpio_resume NULL
 #endif /* CONFIG_PM_SLEEP */
 
 static const struct dev_pm_ops brcmstb_gpio_pm_ops = {
-	.suspend_noirq	= brcmstb_gpio_suspend,
+	.suspend_noirq = brcmstb_gpio_suspend,
 	.resume_noirq = brcmstb_gpio_resume,
 };
 
@@ -633,7 +645,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
 	flags = GPIO_GENERIC_BIG_ENDIAN_BYTE_ORDER;
 #endif
 	if (of_property_read_bool(np, "brcm,gpio-direct"))
-	    flags |= BGPIOF_REG_DIRECT;
+		flags |= GPIO_GENERIC_REG_DIRECT;
 
 	of_property_for_each_u32(np, "brcm,gpio-bank-widths", bank_width) {
 		struct brcmstb_gpio_bank *bank;
@@ -674,7 +686,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
 		 * and direction bits have 0 = output and 1 = input
 		 */
 
-		config = (struct gpio_generic_chip_config) {
+		config = (struct gpio_generic_chip_config){
 			.dev = dev,
 			.sz = 4,
 			.dat = reg_base + GIO_DATA(bank->id),
@@ -684,14 +696,15 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
 
 		err = gpio_generic_chip_init(&bank->chip, &config);
 		if (err) {
-			dev_err(dev, "failed to initialize generic GPIO chip\n");
+			dev_err(dev,
+				"failed to initialize generic GPIO chip\n");
 			goto fail;
 		}
 
 		gc->owner = THIS_MODULE;
 		gc->label = devm_kasprintf(dev, GFP_KERNEL, "gpio-brcmstb@%zx",
 					   (size_t)res->start +
-					   GIO_BANK_OFF(bank->id, 0));
+						   GIO_BANK_OFF(bank->id, 0));
 		if (!gc->label) {
 			err = -ENOMEM;
 			goto fail;
@@ -710,14 +723,17 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
 		 * Mask all interrupts by default, since wakeup interrupts may
 		 * be retained from S5 cold boot
 		 */
-		need_wakeup_event |= !!__brcmstb_gpio_get_active_irqs(bank);
-		gpio_generic_write_reg(&bank->chip,
-				       reg_base + GIO_MASK(bank->id), 0);
+		if (priv->parent_irq > 0) {
+			need_wakeup_event |=
+				!!__brcmstb_gpio_get_active_irqs(bank);
+			gpio_generic_write_reg(
+				&bank->chip, reg_base + GIO_MASK(bank->id), 0);
+		}
 
 		err = gpiochip_add_data(gc, bank);
 		if (err) {
 			dev_err(dev, "Could not add gpiochip for bank %d\n",
-					bank->id);
+				bank->id);
 			goto fail;
 		}
 		num_gpios += gc->ngpio;
@@ -744,7 +760,7 @@ static int brcmstb_gpio_probe(struct platform_device *pdev)
 	return 0;
 
 fail:
-	(void) brcmstb_gpio_remove(pdev);
+	(void)brcmstb_gpio_remove(pdev);
 	return err;
 }
 
diff --git a/drivers/gpio/gpio-mmio.c b/drivers/gpio/gpio-mmio.c
index 960ef1d4681e..9f6b7fcd4f3f 100644
--- a/drivers/gpio/gpio-mmio.c
+++ b/drivers/gpio/gpio-mmio.c
@@ -247,21 +247,22 @@ static int bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
 
 static int bgpio_set_direct(struct gpio_chip *gc, unsigned int gpio, int val)
 {
+	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 	unsigned long mask = bgpio_line2mask(gc, gpio);
 	unsigned long flags;
 
-	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&chip->lock, flags);
 
-	gc->bgpio_data = gc->read_reg(gc->reg_dat);
+	chip->sdata = chip->read_reg(chip->reg_dat);
 
 	if (val)
-		gc->bgpio_data |= mask;
+		chip->sdata |= mask;
 	else
-		gc->bgpio_data &= ~mask;
+		chip->sdata &= ~mask;
 
-	gc->write_reg(gc->reg_dat, gc->bgpio_data);
+	chip->write_reg(chip->reg_dat, chip->sdata);
 
-	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&chip->lock, flags);
 	return 0;
 }
 
@@ -298,8 +299,8 @@ static int bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val)
 	return 0;
 }
 
-static void bgpio_multiple_get_masks(struct gpio_chip *gc,
-				     unsigned long *mask, unsigned long *bits,
+static void bgpio_multiple_get_masks(struct gpio_chip *gc, unsigned long *mask,
+				     unsigned long *bits,
 				     unsigned long *set_mask,
 				     unsigned long *clear_mask)
 {
@@ -338,7 +339,7 @@ static void bgpio_set_multiple_single_reg(struct gpio_chip *gc,
 }
 
 static int bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask,
-			       unsigned long *bits)
+			      unsigned long *bits)
 {
 	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 
@@ -374,29 +375,30 @@ static int bgpio_set_multiple_with_clear(struct gpio_chip *gc,
 	return 0;
 }
 
-static int bgpio_set_multiple_direct(struct gpio_chip *gc,
-				      unsigned long *mask,
-				      unsigned long *bits)
+static int bgpio_set_multiple_direct(struct gpio_chip *gc, unsigned long *mask,
+				     unsigned long *bits)
 {
+	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 	unsigned long flags;
 	unsigned long set_mask, clear_mask;
 
-	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&chip->lock, flags);
 
 	bgpio_multiple_get_masks(gc, mask, bits, &set_mask, &clear_mask);
 
-	gc->bgpio_data = gc->read_reg(gc->reg_dat);
+	chip->sdata = chip->read_reg(chip->reg_dat);
 
-	gc->bgpio_data |= set_mask;
-	gc->bgpio_data &= ~clear_mask;
+	chip->sdata |= set_mask;
+	chip->sdata &= ~clear_mask;
 
-	gc->write_reg(gc->reg_dat, gc->bgpio_data);
+	chip->write_reg(chip->reg_dat, chip->sdata);
 
-	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&chip->lock, flags);
 	return 0;
 }
 
-static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio, bool dir_out)
+static int bgpio_dir_return(struct gpio_chip *gc, unsigned int gpio,
+			    bool dir_out)
 {
 	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 
@@ -419,8 +421,7 @@ static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio)
 	return bgpio_dir_return(gc, gpio, false);
 }
 
-static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio,
-				int val)
+static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, int val)
 {
 	return -EINVAL;
 }
@@ -454,23 +455,24 @@ static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
 
 static int bgpio_dir_in_direct(struct gpio_chip *gc, unsigned int gpio)
 {
+	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 	unsigned long flags;
 
-	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&chip->lock, flags);
 
-	if (gc->reg_dir_in)
-		gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
-	if (gc->reg_dir_out)
-		gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
+	if (chip->reg_dir_in)
+		chip->sdir = ~chip->read_reg(chip->reg_dir_in);
+	if (chip->reg_dir_out)
+		chip->sdir = chip->read_reg(chip->reg_dir_out);
 
-	gc->bgpio_dir &= ~bgpio_line2mask(gc, gpio);
+	chip->sdir &= ~bgpio_line2mask(gc, gpio);
 
-	if (gc->reg_dir_in)
-		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
-	if (gc->reg_dir_out)
-		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
+	if (chip->reg_dir_in)
+		chip->write_reg(chip->reg_dir_in, ~chip->sdir);
+	if (chip->reg_dir_out)
+		chip->write_reg(chip->reg_dir_out, chip->sdir);
 
-	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&chip->lock, flags);
 
 	return 0;
 }
@@ -487,13 +489,15 @@ static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio)
 	}
 
 	if (chip->reg_dir_out) {
-		if (chip->read_reg(chip->reg_dir_out) & bgpio_line2mask(gc, gpio))
+		if (chip->read_reg(chip->reg_dir_out) &
+		    bgpio_line2mask(gc, gpio))
 			return GPIO_LINE_DIRECTION_OUT;
 		return GPIO_LINE_DIRECTION_IN;
 	}
 
 	if (chip->reg_dir_in)
-		if (!(chip->read_reg(chip->reg_dir_in) & bgpio_line2mask(gc, gpio)))
+		if (!(chip->read_reg(chip->reg_dir_in) &
+		      bgpio_line2mask(gc, gpio)))
 			return GPIO_LINE_DIRECTION_OUT;
 
 	return GPIO_LINE_DIRECTION_IN;
@@ -519,23 +523,24 @@ static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
 static void bgpio_dir_out_direct(struct gpio_chip *gc, unsigned int gpio,
 				 int val)
 {
+	struct gpio_generic_chip *chip = to_gpio_generic_chip(gc);
 	unsigned long flags;
 
-	raw_spin_lock_irqsave(&gc->bgpio_lock, flags);
+	raw_spin_lock_irqsave(&chip->lock, flags);
 
-	if (gc->reg_dir_in)
-		gc->bgpio_dir = ~gc->read_reg(gc->reg_dir_in);
-	if (gc->reg_dir_out)
-		gc->bgpio_dir = gc->read_reg(gc->reg_dir_out);
+	if (chip->reg_dir_in)
+		chip->sdir = ~chip->read_reg(chip->reg_dir_in);
+	if (chip->reg_dir_out)
+		chip->sdir = chip->read_reg(chip->reg_dir_out);
 
-	gc->bgpio_dir |= bgpio_line2mask(gc, gpio);
+	chip->sdir |= bgpio_line2mask(gc, gpio);
 
-	if (gc->reg_dir_in)
-		gc->write_reg(gc->reg_dir_in, ~gc->bgpio_dir);
-	if (gc->reg_dir_out)
-		gc->write_reg(gc->reg_dir_out, gc->bgpio_dir);
+	if (chip->reg_dir_in)
+		chip->write_reg(chip->reg_dir_in, ~chip->sdir);
+	if (chip->reg_dir_out)
+		chip->write_reg(chip->reg_dir_out, chip->sdir);
 
-	raw_spin_unlock_irqrestore(&gc->bgpio_lock, flags);
+	raw_spin_unlock_irqrestore(&chip->lock, flags);
 }
 
 static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio,
@@ -571,30 +576,29 @@ static int bgpio_dir_out_val_first_direct(struct gpio_chip *gc,
 }
 
 static int bgpio_setup_accessors(struct device *dev,
-				 struct gpio_generic_chip *chip,
-				 bool byte_be)
+				 struct gpio_generic_chip *chip, bool byte_be)
 {
 	switch (chip->bits) {
 	case 8:
-		chip->read_reg	= bgpio_read8;
-		chip->write_reg	= bgpio_write8;
+		chip->read_reg = bgpio_read8;
+		chip->write_reg = bgpio_write8;
 		break;
 	case 16:
 		if (byte_be) {
-			chip->read_reg	= bgpio_read16be;
-			chip->write_reg	= bgpio_write16be;
+			chip->read_reg = bgpio_read16be;
+			chip->write_reg = bgpio_write16be;
 		} else {
-			chip->read_reg	= bgpio_read16;
-			chip->write_reg	= bgpio_write16;
+			chip->read_reg = bgpio_read16;
+			chip->write_reg = bgpio_write16;
 		}
 		break;
 	case 32:
 		if (byte_be) {
-			chip->read_reg	= bgpio_read32be;
-			chip->write_reg	= bgpio_write32be;
+			chip->read_reg = bgpio_read32be;
+			chip->write_reg = bgpio_write32be;
 		} else {
-			chip->read_reg	= bgpio_read32;
-			chip->write_reg	= bgpio_write32;
+			chip->read_reg = bgpio_read32;
+			chip->write_reg = bgpio_write32;
 		}
 		break;
 #if BITS_PER_LONG >= 64
@@ -604,8 +608,8 @@ static int bgpio_setup_accessors(struct device *dev,
 				"64 bit big endian byte order unsupported\n");
 			return -EINVAL;
 		} else {
-			chip->read_reg	= bgpio_read64;
-			chip->write_reg	= bgpio_write64;
+			chip->read_reg = bgpio_read64;
+			chip->write_reg = bgpio_write64;
 		}
 		break;
 #endif /* BITS_PER_LONG >= 64 */
@@ -660,7 +664,7 @@ static int bgpio_setup_io(struct gpio_generic_chip *chip,
 	} else if (cfg->flags & GPIO_GENERIC_NO_OUTPUT) {
 		gc->set = bgpio_set_none;
 		gc->set_multiple = NULL;
-	} else if (flags & BGPIOF_REG_DIRECT) {
+	} else if (cfg->flags & GPIO_GENERIC_REG_DIRECT) {
 		gc->set = bgpio_set_direct;
 		gc->set_multiple = bgpio_set_multiple_direct;
 	} else {
@@ -699,11 +703,21 @@ static int bgpio_setup_direction(struct gpio_generic_chip *chip,
 	if (cfg->dirout || cfg->dirin) {
 		chip->reg_dir_out = cfg->dirout;
 		chip->reg_dir_in = cfg->dirin;
-		if (cfg->flags & GPIO_GENERIC_NO_SET_ON_INPUT)
-			gc->direction_output = bgpio_dir_out_dir_first;
-		else
-			gc->direction_output = bgpio_dir_out_val_first;
-		gc->direction_input = bgpio_dir_in;
+		if (cfg->flags & GPIO_GENERIC_REG_DIRECT) {
+			if (cfg->flags & GPIO_GENERIC_NO_SET_ON_INPUT)
+				gc->direction_output =
+					bgpio_dir_out_dir_first_direct;
+			else
+				gc->direction_output =
+					bgpio_dir_out_val_first_direct;
+			gc->direction_input = bgpio_dir_in_direct;
+		} else {
+			if (cfg->flags & GPIO_GENERIC_NO_SET_ON_INPUT)
+				gc->direction_output = bgpio_dir_out_dir_first;
+			else
+				gc->direction_output = bgpio_dir_out_val_first;
+			gc->direction_input = bgpio_dir_in;
+		}
 		gc->get_direction = bgpio_get_dir;
 	} else {
 		if (cfg->flags & GPIO_GENERIC_NO_OUTPUT)
@@ -787,7 +801,7 @@ int gpio_generic_chip_init(struct gpio_generic_chip *chip,
 
 	chip->sdata = chip->read_reg(chip->reg_dat);
 	if (gc->set == bgpio_set_set &&
-			!(flags & GPIO_GENERIC_UNREADABLE_REG_SET))
+	    !(flags & GPIO_GENERIC_UNREADABLE_REG_SET))
 		chip->sdata = chip->read_reg(chip->reg_set);
 
 	if (flags & GPIO_GENERIC_UNREADABLE_REG_DIR)
@@ -818,8 +832,7 @@ EXPORT_SYMBOL_GPL(gpio_generic_chip_init);
 
 #if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM)
 
-static void __iomem *bgpio_map(struct platform_device *pdev,
-			       const char *name,
+static void __iomem *bgpio_map(struct platform_device *pdev, const char *name,
 			       resource_size_t sane_sz)
 {
 	struct resource *r;
@@ -841,7 +854,7 @@ static const struct of_device_id bgpio_of_match[] = {
 	{ .compatible = "wd,mbl-gpio" },
 	{ .compatible = "ni,169445-nand-gpio" },
 	{ .compatible = "intel,ixp4xx-expansion-bus-mmio-gpio" },
-	{ }
+	{}
 };
 MODULE_DEVICE_TABLE(of, bgpio_of_match);
 
@@ -898,7 +911,7 @@ static int bgpio_pdev_probe(struct platform_device *pdev)
 	if (device_property_read_bool(dev, "no-output"))
 		flags |= GPIO_GENERIC_NO_OUTPUT;
 
-	config = (struct gpio_generic_chip_config) {
+	config = (struct gpio_generic_chip_config){
 		.dev = dev,
 		.sz = sz,
 		.dat = dat,
@@ -932,10 +945,10 @@ static int bgpio_pdev_probe(struct platform_device *pdev)
 
 static const struct platform_device_id bgpio_id_table[] = {
 	{
-		.name		= "basic-mmio-gpio",
-		.driver_data	= 0,
+		.name = "basic-mmio-gpio",
+		.driver_data = 0,
 	},
-	{ }
+	{}
 };
 MODULE_DEVICE_TABLE(platform, bgpio_id_table);