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| author | Gabor Juhos <[email protected]> | 2025-07-23 08:06:43 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2025-07-23 12:04:03 +0000 |
| commit | f820034864dd463cdcd2bebe7940f2eca0eb4223 (patch) | |
| tree | ace4cb6af172576a43528394b528c064e93906d4 /drivers/gpio/gpio-mpc5200.c | |
| parent | spi: Add check for 8-bit transfer with 8 IO mode support (diff) | |
| download | kernel-f820034864dd463cdcd2bebe7940f2eca0eb4223.tar.gz kernel-f820034864dd463cdcd2bebe7940f2eca0eb4223.zip | |
spi: spi-qpic-snand: don't hardcode ECC steps
NAND devices with different page sizes requires different number
of ECC steps, yet the qcom_spi_ecc_init_ctx_pipelined() function
sets 4 steps in 'ecc_cfg' unconditionally.
The correct number of the steps is calculated earlier in the
function already, so use that instead of the hardcoded value.
Fixes: 7304d1909080 ("spi: spi-qpic: add driver for QCOM SPI NAND flash Interface")
Signed-off-by: Gabor Juhos <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/gpio/gpio-mpc5200.c')
0 files changed, 0 insertions, 0 deletions