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| author | james qian wang (Arm Technology China) <[email protected]> | 2019-06-05 10:35:45 +0000 |
|---|---|---|
| committer | Liviu Dudau <[email protected]> | 2019-06-19 10:42:17 +0000 |
| commit | 619053220a7d5620d26d60d1848ca9c681bea830 (patch) | |
| tree | c2dddfabfd44a0557baaa2971a34e4358c1ad72a /drivers/fpga/xilinx-spi.c | |
| parent | drm/komeda: Rename main engine clk name "mclk" to "aclk" (diff) | |
| download | kernel-619053220a7d5620d26d60d1848ca9c681bea830.tar.gz kernel-619053220a7d5620d26d60d1848ca9c681bea830.zip | |
dt/bindings: drm/komeda: Unify mclk/pclk/pipeline->aclk to one ACLK
Current komeda driver uses three dedicated clks for a specific purpose:
- mclk: main engine clock
- pclk: APB clock
- pipeline->aclk: AXI clock.
But per spec the komeda HW only has three input clks:
- ACLK: used for AXI masters, APB slave and most pipeline processing
- PXCLK for pipeline 0: output pixel clock for pipeline 0
- PXCLK for pipeline 1: output pixel clock for pipeline 1
So one ACLK is enough, no need to split it to three mclk/pclk/axiclk.
Signed-off-by: James Qian Wang (Arm Technology China) <[email protected]>
Signed-off-by: Liviu Dudau <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions