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| author | Laurent Pinchart <[email protected]> | 2019-03-04 19:47:51 +0000 |
|---|---|---|
| committer | Laurent Pinchart <[email protected]> | 2019-06-07 23:36:04 +0000 |
| commit | 3cb120814eb956d3673e00a419cb6cc6a82c15fe (patch) | |
| tree | d96f1bd9f44b810bdfc796f6bc8874cf5a6e1ad9 /drivers/fpga/xilinx-spi.c | |
| parent | drm: bridge: Add dual_link field to the drm_bridge_timings structure (diff) | |
| download | kernel-3cb120814eb956d3673e00a419cb6cc6a82c15fe.tar.gz kernel-3cb120814eb956d3673e00a419cb6cc6a82c15fe.zip | |
dt-bindings: display: bridge: thc63lvd1024: Document dual-link operation
The THC63LVD1024 LVDS decoder can operate in two modes, single-link or
dual-link. In dual-link mode both input ports are used to carry even-
and odd-numbered pixels separately. Document this in the DT bindings,
along with the related rules governing port and usage.
Signed-off-by: Laurent Pinchart <[email protected]>
Reviewed-by: Jacopo Mondi <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Tested-by: Jacopo Mondi <[email protected]>
Acked-by: Sam Ravnborg <[email protected]>
Reviewed-by: Kieran Bingham <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions