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| author | Ingo Flaschberger <[email protected]> | 2018-05-01 14:10:33 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2018-05-14 14:33:18 +0000 |
| commit | 065c09563c872e52813a17218c52cd642be1dca6 (patch) | |
| tree | ae81e598f6dd94e8cd1a919859c15f9ac93b63c7 /drivers/fpga/xilinx-spi.c | |
| parent | w1: mxc_w1: Enable clock before calling clk_get_rate() on it (diff) | |
| download | kernel-065c09563c872e52813a17218c52cd642be1dca6.tar.gz kernel-065c09563c872e52813a17218c52cd642be1dca6.zip | |
1wire: family module autoload fails because of upper/lower case mismatch.
1wire family module autoload fails because of upper/lower
case mismatch.
Signed-off-by: Ingo Flaschberger <[email protected]>
Acked-by: Evgeniy Polyakov <[email protected]>
Cc: stable <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'drivers/fpga/xilinx-spi.c')
0 files changed, 0 insertions, 0 deletions