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authorAlexander Sverdlin <[email protected]>2025-08-21 12:00:57 +0000
committerMiquel Raynal <[email protected]>2025-08-28 12:28:13 +0000
commitfd779eac2d659668be4d3dbdac0710afd5d6db12 (patch)
tree60da6cd12e013c5db5e93082208769243621e268 /drivers/fpga/tests/fpga-region-test.c
parentmtd: rawnand: stm32_fmc2: fix ECC overwrite (diff)
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mtd: nand: raw: atmel: Respect tAR, tCLR in read setup timing
Having setup time 0 violates tAR, tCLR of some chips, for instance TOSHIBA TC58NVG2S3ETAI0 cannot be detected successfully (first ID byte being read duplicated, i.e. 98 98 dc 90 15 76 14 03 instead of 98 dc 90 15 76 ...). Atmel Application Notes postulated 1 cycle NRD_SETUP without explanation [1], but it looks more appropriate to just calculate setup time properly. [1] Link: https://ww1.microchip.com/downloads/aemDocuments/documents/MPU32/ApplicationNotes/ApplicationNotes/doc6255.pdf Cc: [email protected] Fixes: f9ce2eddf176 ("mtd: nand: atmel: Add ->setup_data_interface() hooks") Signed-off-by: Alexander Sverdlin <[email protected]> Tested-by: Alexander Dahl <[email protected]> Signed-off-by: Miquel Raynal <[email protected]>
Diffstat (limited to 'drivers/fpga/tests/fpga-region-test.c')
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