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authorRaju Rangoju <[email protected]>2025-05-16 10:06:57 +0000
committerMark Brown <[email protected]>2025-05-19 12:13:37 +0000
commita5733666c775eb852409261d7a6363883d97ff93 (patch)
tree2fb31ae9ebcb176dcf20d6b9b649345a48275401 /drivers/fpga/tests/fpga-mgr-test.c
parentspi: spi_amd: Remove read{q,b} usage on DMA buffer (diff)
downloadkernel-a5733666c775eb852409261d7a6363883d97ff93.tar.gz
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spi: spi_amd: Add HIDDMA basic write support
SPI index mode has hardware limitation of transferring only 64 bytes per transaction due to fixed number of FIFO registers. This constraint leads to performance issues when reading/writing data to/from NAND/NOR flash devices, as the controller must issue multiple requests to read/write 64-byte chunks, even if the slave can transfer up to 2 or 4 KB in a single transaction. The AMD HID2 SPI controller supports DMA mode, allowing for reading/writing up to 4 KB of data in a single transaction. The existing spi_amd driver already supports HID2 DMA read operations. This patch introduces changes to implement HID2 DMA single mode basic write support for the HID2 SPI controller. Co-developed-by: Krishnamoorthi M <[email protected]> Signed-off-by: Krishnamoorthi M <[email protected]> Co-developed-by: Akshata MukundShetty <[email protected]> Signed-off-by: Akshata MukundShetty <[email protected]> Signed-off-by: Raju Rangoju <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/fpga/tests/fpga-mgr-test.c')
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