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| author | Frank Li <[email protected]> | 2025-04-07 15:04:42 +0000 |
|---|---|---|
| committer | Rob Herring (Arm) <[email protected]> | 2025-04-07 23:48:10 +0000 |
| commit | 71d2143266efe0fca1583994af65c08643548316 (patch) | |
| tree | 538d695aa443e85de4a2c10ce88fb0985c83649c /drivers/fpga/tests/fpga-mgr-test.c | |
| parent | dt-bindings: xilinx: Remove myself from maintainership (diff) | |
| download | kernel-71d2143266efe0fca1583994af65c08643548316.tar.gz kernel-71d2143266efe0fca1583994af65c08643548316.zip | |
dt-bindings: display: nwl-dsi: Allow 'data-lanes' property for port@1
This controller support scalable data lanes from 1 to 4. Add the
'data-lanes' property to configure the number of MIPI display panel lanes
selected for boards.
Change $ref of port@1 from 'port' to 'port-base' and add 'endpoint'
property referencing video-interfaces.yaml. Allow 'data-lanes' values
1, 2, 3, and 4 for port@1.
Fix below CHECK_DTB warnings:
arch/arm64/boot/dts/freescale/imx8mq-tqma8mq-mba8mx-lvds-tm070jvhg33.dtb:
dsi@30a00000: ports:port@1:endpoint: Unevaluated properties are not allowed ('data-lanes' was unexpected)
Reviewed-by: Krzysztof Kozlowski <[email protected]>
Signed-off-by: Frank Li <[email protected]>
Reviewed-by: Alexander Stein <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Rob Herring (Arm) <[email protected]>
Diffstat (limited to 'drivers/fpga/tests/fpga-mgr-test.c')
0 files changed, 0 insertions, 0 deletions