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| author | George Shen <[email protected]> | 2022-10-14 21:46:03 +0000 |
|---|---|---|
| committer | Alex Deucher <[email protected]> | 2022-11-02 21:16:25 +0000 |
| commit | d5e0fb0d9dea545defb963ec1073bd9a1a8b5395 (patch) | |
| tree | 88674228656778d0f1c7c48b672a75e23eb23576 /drivers/fpga/microchip-spi.c | |
| parent | drm/amd/display: Round up DST_after_scaler to nearest int (diff) | |
| download | kernel-d5e0fb0d9dea545defb963ec1073bd9a1a8b5395.tar.gz kernel-d5e0fb0d9dea545defb963ec1073bd9a1a8b5395.zip | |
drm/amd/display: Add DSC delay factor workaround
[Why]
Certain 4K high refresh rate modes requiring DSC are exhibiting top
of screen underflow corruption. Increasing the DSC delay by a factor
of 6 percent stops the underflow for most use cases.
[How]
Multiply DSC delay requirement in DML by a factor.
Add debug option to make this DSC delay factor configurable.
Reviewed-by: Alvin Lee <[email protected]>
Acked-by: Alex Hung <[email protected]>
Signed-off-by: George Shen <[email protected]>
Tested-by: Mark Broadworth <[email protected]>
Signed-off-by: Alex Deucher <[email protected]>
Diffstat (limited to 'drivers/fpga/microchip-spi.c')
0 files changed, 0 insertions, 0 deletions