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| author | Marc Zyngier <[email protected]> | 2022-07-20 10:52:19 +0000 |
|---|---|---|
| committer | Will Deacon <[email protected]> | 2022-07-25 10:02:11 +0000 |
| commit | 892f7237b3ffb090f1b1f1e55fe7c50664405aed (patch) | |
| tree | a354a336824ac06f7aa9f78ef1ad7aaa484ffe5a /drivers/fpga/microchip-spi.c | |
| parent | Merge branch 'for-next/boot' into for-next/core (diff) | |
| download | kernel-892f7237b3ffb090f1b1f1e55fe7c50664405aed.tar.gz kernel-892f7237b3ffb090f1b1f1e55fe7c50664405aed.zip | |
arm64: Delay initialisation of cpuinfo_arm64::reg_{zcr,smcr}
Even if we are now able to tell the kernel to avoid exposing SVE/SME
from the command line, we still have a couple of places where we
unconditionally access the ZCR_EL1 (resp. SMCR_EL1) registers.
On systems with broken firmwares, this results in a crash even if
arm64.nosve (resp. arm64.nosme) was passed on the command-line.
To avoid this, only update cpuinfo_arm64::reg_{zcr,smcr} once
we have computed the sanitised version for the corresponding
feature registers (ID_AA64PFR0 for SVE, and ID_AA64PFR1 for
SME). This results in some minor refactoring.
Reviewed-by: Mark Brown <[email protected]>
Reviewed-by: Peter Collingbourne <[email protected]>
Tested-by: Peter Collingbourne <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Will Deacon <[email protected]>
Diffstat (limited to 'drivers/fpga/microchip-spi.c')
0 files changed, 0 insertions, 0 deletions
