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authorAndi Kleen <[email protected]>2015-09-09 21:53:59 +0000
committerIngo Molnar <[email protected]>2015-09-18 07:20:22 +0000
commitd0dc8494cd6904f8ad035d9ad97f313948f35d0c (patch)
tree2d75bb8c78333700c0ddba069911d6fe394475a4 /drivers/fpga/fpga-mgr.c
parentperf/x86/intel: Make the CYCLE_ACTIVITY.* constraint on Broadwell more specific (diff)
downloadkernel-d0dc8494cd6904f8ad035d9ad97f313948f35d0c.tar.gz
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perf/x86/intel/pebs: Add PEBS frontend profiling for Skylake
Skylake has a new FRONTEND_LATENCY PEBS event to accurately profile frontend problems (like ITLB or decoding issues). The new event is configured through a separate MSR, which selects a range of sub events. Define the extra MSR as a extra reg and export support for it through sysfs. To avoid duplicating the existing tables use a new function to add new entries to existing tables. Signed-off-by: Andi Kleen <[email protected]> Signed-off-by: Peter Zijlstra (Intel) <[email protected]> Acked-by: Thomas Gleixner <[email protected]> Cc: Linus Torvalds <[email protected]> Cc: Peter Zijlstra <[email protected]> Link: http://lkml.kernel.org/r/[email protected] Signed-off-by: Ingo Molnar <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
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