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| author | [email protected] <[email protected]> | 2015-09-17 08:16:19 +0000 |
|---|---|---|
| committer | Ulf Hansson <[email protected]> | 2015-10-08 17:55:05 +0000 |
| commit | af951761d01c89eea8f1dcccf8010218e4b55817 (patch) | |
| tree | 41f5fa35918daed8aa7353fe7123bd83b224ada1 /drivers/fpga/fpga-mgr.c | |
| parent | mmc: sdhci-pxav3: fix error handling of armada_38x_quirks (diff) | |
| download | kernel-af951761d01c89eea8f1dcccf8010218e4b55817.tar.gz kernel-af951761d01c89eea8f1dcccf8010218e4b55817.zip | |
mmc: sdhci: add quirk SDHCI_QUIRK2_NEED_DELAY_AFTER_INT_CLK_RST
The Atmel sdhci device needs a new quirk. sdhci_set_clock set the Clock
Control Register to 0 before computing the new value and writing it.
It disables the internal clock which causes a reset mecanism. If we
write the new value before this reset mecanism is done, it will prevent
the stabilisation of the internal clock, so a delay is needed. This
delay is about 2-3 cycles of the base clock. To be safe, a 1 ms delay is
used.
Signed-off-by: Ludovic Desroches <[email protected]>
Signed-off-by: Ulf Hansson <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-mgr.c')
0 files changed, 0 insertions, 0 deletions