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| author | Paul Cercueil <[email protected]> | 2019-03-19 14:05:35 +0000 |
|---|---|---|
| committer | Stephen Boyd <[email protected]> | 2019-04-11 20:40:58 +0000 |
| commit | 93dc07f8b089ee073075c22873ab707225e192b5 (patch) | |
| tree | a835bd2b38d36cae0a52699f6e8a7bb5dc40e736 /drivers/fpga/fpga-bridge.c | |
| parent | Linux 5.1-rc1 (diff) | |
| download | kernel-93dc07f8b089ee073075c22873ab707225e192b5.tar.gz kernel-93dc07f8b089ee073075c22873ab707225e192b5.zip | |
dt-bindings: clock: jz4725b-cgu: Add UDC PHY clock
Add macro for the UDC PHY clock of the JZ4725B.
Signed-off-by: Paul Cercueil <[email protected]>
Reviewed-by: Rob Herring <[email protected]>
Signed-off-by: Stephen Boyd <[email protected]>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
0 files changed, 0 insertions, 0 deletions