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| author | Luca Ceresoli <[email protected]> | 2020-06-11 21:11:42 +0000 |
|---|---|---|
| committer | Moritz Fischer <[email protected]> | 2020-06-19 01:19:44 +0000 |
| commit | 23f872b6ece695750667a44016037154b91addef (patch) | |
| tree | 105b078df4eae4151422eb144473175660831c9b /drivers/fpga/dfl.c | |
| parent | fpga manager: xilinx-spi: valid for the 7 Series too (diff) | |
| download | kernel-23f872b6ece695750667a44016037154b91addef.tar.gz kernel-23f872b6ece695750667a44016037154b91addef.zip | |
fpga manager: xilinx-spi: remove unneeded, mistyped variables
Using variables does not add readability here: parameters passed
to udelay*() are obviously in microseconds and their meaning is clear
from the context.
The type is also wrong, udelay expects an unsigned long.
Signed-off-by: Luca Ceresoli <[email protected]>
Signed-off-by: Moritz Fischer <[email protected]>
Diffstat (limited to 'drivers/fpga/dfl.c')
0 files changed, 0 insertions, 0 deletions