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| author | Alan Tull <[email protected]> | 2017-03-24 00:34:27 +0000 |
|---|---|---|
| committer | Greg Kroah-Hartman <[email protected]> | 2017-04-08 15:45:28 +0000 |
| commit | 42d5ec954719917e2b7a9160fe05d2316eece5bf (patch) | |
| tree | 19088b3704312ff5f8f6b4e2790e3963ebb2d4da /drivers/fpga/altera-pr-ip-core.c | |
| parent | fpga manager: Add Xilinx slave serial SPI driver (diff) | |
| download | kernel-42d5ec954719917e2b7a9160fe05d2316eece5bf.tar.gz kernel-42d5ec954719917e2b7a9160fe05d2316eece5bf.zip | |
fpga: add config complete timeout
Adding timeout for maximum allowed time for FPGA to go to
operating mode after a FPGA region has been programmed.
Signed-off-by: Alan Tull <[email protected]>
Signed-off-by: Greg Kroah-Hartman <[email protected]>
Diffstat (limited to 'drivers/fpga/altera-pr-ip-core.c')
0 files changed, 0 insertions, 0 deletions