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| author | Khairul Anuar Romli <[email protected]> | 2025-09-10 08:06:32 +0000 |
|---|---|---|
| committer | Mark Brown <[email protected]> | 2025-09-18 21:24:03 +0000 |
| commit | 30dbc1c8d50f13c1581b49abe46fe89f393eacbf (patch) | |
| tree | 221267f2dfff9cd6211d6172d11584a01bc53644 /drivers/cpufreq/intel_pstate.c | |
| parent | Linux 6.17-rc6 (diff) | |
| download | kernel-30dbc1c8d50f13c1581b49abe46fe89f393eacbf.tar.gz kernel-30dbc1c8d50f13c1581b49abe46fe89f393eacbf.zip | |
spi: cadence-qspi: defer runtime support on socfpga if reset bit is enabled
Enabling runtime PM allows the kernel to gate clocks and power to idle
devices. On SoCFPGA, a warm reset does not fully reinitialize these
domains.This leaves devices suspended and powered down, preventing U-Boot
or the kernel from reusing them after a warm reset, which breaks the boot
process.
Fixes: 4892b374c9b7 ("mtd: spi-nor: cadence-quadspi: Add runtime PM support")
CC: [email protected] # 6.12+
Signed-off-by: Khairul Anuar Romli <[email protected]>
Signed-off-by: Adrian Ng Ho Yin <[email protected]>
Reviewed-by: Niravkumar L Rabara <[email protected]>
Reviewed-by: Matthew Gerlach <[email protected]>
Link: https://patch.msgid.link/910aad68ba5d948919a7b90fa85a2fadb687229b.1757491372.git.khairul.anuar.romli@altera.com
Signed-off-by: Mark Brown <[email protected]>
Diffstat (limited to 'drivers/cpufreq/intel_pstate.c')
0 files changed, 0 insertions, 0 deletions