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| author | Minghuan Lian <[email protected]> | 2013-06-21 10:59:12 +0000 |
|---|---|---|
| committer | Scott Wood <[email protected]> | 2013-08-07 23:38:05 +0000 |
| commit | 03daa99ef50873651e363fc12ae0b5facdb3f831 (patch) | |
| tree | 4c8222c81d769dfbd1186f47aaf06a8b95e33835 /arch/powerpc/sysdev/fsl_msi.c | |
| parent | powerpc/msi: Fix compile error on mpc83xx (diff) | |
| download | kernel-03daa99ef50873651e363fc12ae0b5facdb3f831.tar.gz kernel-03daa99ef50873651e363fc12ae0b5facdb3f831.zip | |
powerpc/dts: update MSI bindings doc for MPIC v4.3
Add compatible "fsl,mpic-msi-v4.3" for MPIC v4.3. MPIC v4.3 contains
MSIIR and MSIIR1. MSIIR supports 8 MSI registers and MSIIR1 supports
16 MSI registers, but uses different IBS and SRS shift. When using
MSIR1, the interrupt number is not consecutive. It is hard to use
'msi-available-ranges' to describe the ranges of the available
interrupt, so MPIC v4.3 does not support this property.
Signed-off-by: Minghuan Lian <[email protected]>
[[email protected]: minor grammar fixes]
Signed-off-by: Scott Wood <[email protected]>
Diffstat (limited to 'arch/powerpc/sysdev/fsl_msi.c')
0 files changed, 0 insertions, 0 deletions