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| author | Markos Chandras <[email protected]> | 2014-01-30 17:21:29 +0000 |
|---|---|---|
| committer | Ralf Baechle <[email protected]> | 2014-03-06 20:25:21 +0000 |
| commit | 02dc6bfb080e8205aacea5c4b4dd6a9bd4c9406e (patch) | |
| tree | 08224e4eb6d1b1471cc3322b626250e2d82bce7e /arch/mips/mm/sc-mips.c | |
| parent | Linux 3.14-rc5 (diff) | |
| download | kernel-02dc6bfb080e8205aacea5c4b4dd6a9bd4c9406e.tar.gz kernel-02dc6bfb080e8205aacea5c4b4dd6a9bd4c9406e.zip | |
MIPS: mm: c-r4k: Detect instruction cache aliases
The *Aptiv cores can use the CONF7/IAR bit to detect if the core
has hardware support to remove instruction cache aliasing.
This also defines the CONF7/AR bit in order to avoid using
the '16' magic number.
Signed-off-by: Markos Chandras <[email protected]>
Cc: [email protected]
Patchwork: https://patchwork.linux-mips.org/patch/6499/
Signed-off-by: Ralf Baechle <[email protected]>
Diffstat (limited to 'arch/mips/mm/sc-mips.c')
0 files changed, 0 insertions, 0 deletions