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| author | Marc Zyngier <[email protected]> | 2025-01-24 19:04:26 +0000 |
|---|---|---|
| committer | Marc Zyngier <[email protected]> | 2025-05-10 10:04:35 +0000 |
| commit | ef6d7d2682d948df217db73985e0a159305c7743 (patch) | |
| tree | 5c35ad7bca502859d1908775e3d4c407697602b1 /arch/arm64/kvm/emulate-nested.c | |
| parent | KVM: arm64: Remove hand-crafted masks for FGT registers (diff) | |
| download | kernel-ef6d7d2682d948df217db73985e0a159305c7743.tar.gz kernel-ef6d7d2682d948df217db73985e0a159305c7743.zip | |
KVM: arm64: Use KVM-specific HCRX_EL2 RES0 mask
We do not have a computed table for HCRX_EL2, so statically define
the bits we know about. A warning will fire if the architecture
grows bits that are not handled yet.
Reviewed-by: Joey Gouly <[email protected]>
Signed-off-by: Marc Zyngier <[email protected]>
Diffstat (limited to 'arch/arm64/kvm/emulate-nested.c')
| -rw-r--r-- | arch/arm64/kvm/emulate-nested.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c index c30d970bf81c..c581cf29bc59 100644 --- a/arch/arm64/kvm/emulate-nested.c +++ b/arch/arm64/kvm/emulate-nested.c @@ -2157,6 +2157,7 @@ int __init populate_nv_trap_config(void) BUILD_BUG_ON(__NR_CGT_GROUP_IDS__ > BIT(TC_CGT_BITS)); BUILD_BUG_ON(__NR_FGT_GROUP_IDS__ > BIT(TC_FGT_BITS)); BUILD_BUG_ON(__NR_FG_FILTER_IDS__ > BIT(TC_FGF_BITS)); + BUILD_BUG_ON(__HCRX_EL2_MASK & __HCRX_EL2_nMASK); for (int i = 0; i < ARRAY_SIZE(encoding_to_cgt); i++) { const struct encoding_to_trap_config *cgt = &encoding_to_cgt[i]; @@ -2182,6 +2183,10 @@ int __init populate_nv_trap_config(void) } } + if (__HCRX_EL2_RES0 != HCRX_EL2_RES0) + kvm_info("Sanitised HCR_EL2_RES0 = %016llx, expecting %016llx\n", + __HCRX_EL2_RES0, HCRX_EL2_RES0); + kvm_info("nv: %ld coarse grained trap handlers\n", ARRAY_SIZE(encoding_to_cgt)); |