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| author | Jisheng Zhang <[email protected]> | 2024-03-25 11:10:37 +0000 |
|---|---|---|
| committer | Palmer Dabbelt <[email protected]> | 2024-04-24 19:57:48 +0000 |
| commit | eb1e5037294652ddf1437f62292c0727183f11ae (patch) | |
| tree | 721019ce93d3ea79aed7a71fdd8f3e5d8dd0ace8 | |
| parent | Linux 6.8-rc1 (diff) | |
| download | kernel-eb1e5037294652ddf1437f62292c0727183f11ae.tar.gz kernel-eb1e5037294652ddf1437f62292c0727183f11ae.zip | |
riscv: select ARCH_USE_CMPXCHG_LOCKREF
Select ARCH_USE_CMPXCHG_LOCKREF to enable the cmpxchg-based lockless
lockref implementation for riscv.
Using Linus' test case[1] on TH1520 platform, I see a 11.2% improvement.
On JH7110 platform, I see 12.0% improvement.
Link: http://marc.info/?l=linux-fsdevel&m=137782380714721&w=4 [1]
Signed-off-by: Jisheng Zhang <[email protected]>
Reviewed-by: Andrea Parri <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Palmer Dabbelt <[email protected]>
| -rw-r--r-- | arch/riscv/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index bffbd869a068..b8b96baad058 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -50,6 +50,7 @@ config RISCV select ARCH_SUPPORTS_PAGE_TABLE_CHECK if MMU select ARCH_SUPPORTS_PER_VMA_LOCK if MMU select ARCH_SUPPORTS_SHADOW_CALL_STACK if HAVE_SHADOW_CALL_STACK + select ARCH_USE_CMPXCHG_LOCKREF if 64BIT select ARCH_USE_MEMTEST select ARCH_USE_QUEUED_RWLOCKS select ARCH_USES_CFI_TRAPS if CFI_CLANG |