aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorAkhil R <[email protected]>2022-11-10 17:17:46 +0000
committerVinod Koul <[email protected]>2022-11-13 22:31:12 +0000
commitd57b2a65cde743a490a848236641fe9aa5536a9b (patch)
treed099c0b9e7d5bb75dca55a541f64c6023cda1fab
parentdmaengine: idxd: Remove linux/msi.h include (diff)
downloadkernel-d57b2a65cde743a490a848236641fe9aa5536a9b.tar.gz
kernel-d57b2a65cde743a490a848236641fe9aa5536a9b.zip
dt-bindings: dmaengine: Add dma-channel-mask to Tegra GPCDMA
Add dma-channel-mask property in Tegra GPCDMA document. The property would help to specify the channels to be used in kernel and reserve few for the firmware. This was previously achieved by limiting the channel number to 31 in the driver. This is wrong and does not align with the hardware. Correct this and set the max interrupts to 32. Signed-off-by: Akhil R <[email protected]> Acked-by: Thierry Reding <[email protected]> Acked-by: Krzysztof Kozlowski <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vinod Koul <[email protected]>
-rw-r--r--Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml7
1 files changed, 6 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
index c8894476b6ab..851bd50ee67f 100644
--- a/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
+++ b/Documentation/devicetree/bindings/dma/nvidia,tegra186-gpc-dma.yaml
@@ -39,7 +39,7 @@ properties:
Should contain all of the per-channel DMA interrupts in
ascending order with respect to the DMA channel index.
minItems: 1
- maxItems: 31
+ maxItems: 32
resets:
maxItems: 1
@@ -52,6 +52,9 @@ properties:
dma-coherent: true
+ dma-channel-mask:
+ maxItems: 1
+
required:
- compatible
- reg
@@ -60,6 +63,7 @@ required:
- reset-names
- "#dma-cells"
- iommus
+ - dma-channel-mask
additionalProperties: false
@@ -108,5 +112,6 @@ examples:
#dma-cells = <1>;
iommus = <&smmu TEGRA186_SID_GPCDMA_0>;
dma-coherent;
+ dma-channel-mask = <0xfffffffe>;
};
...