diff options
| author | Konrad Dybcio <[email protected]> | 2023-03-29 14:01:35 +0000 |
|---|---|---|
| committer | Bjorn Andersson <[email protected]> | 2023-04-07 16:27:02 +0000 |
| commit | 93f21d925f787eb4a91e7ade77a544df30be0605 (patch) | |
| tree | 4f7c1d6d1785c630b17c8d1f049e4b16be384ca3 | |
| parent | clk: qcom: gcc-sm6115: Mark RCGs shared where applicable (diff) | |
| download | kernel-93f21d925f787eb4a91e7ade77a544df30be0605.tar.gz kernel-93f21d925f787eb4a91e7ade77a544df30be0605.zip | |
clk: qcom: gpucc-sm6375: Configure CX_GDSC disable wait value
Configure the disable wait value on the CX GDSC to ensure we don't get
any undefined behavior. This was omitted when first adding the driver.
Fixes: 8397e24278b3 ("clk: qcom: Add GPU clock controller driver for SM6375")
Signed-off-by: Konrad Dybcio <[email protected]>
Signed-off-by: Bjorn Andersson <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
| -rw-r--r-- | drivers/clk/qcom/gpucc-sm6375.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/clk/qcom/gpucc-sm6375.c b/drivers/clk/qcom/gpucc-sm6375.c index d8f4c4b59f1b..d3620344a009 100644 --- a/drivers/clk/qcom/gpucc-sm6375.c +++ b/drivers/clk/qcom/gpucc-sm6375.c @@ -358,6 +358,7 @@ static struct clk_branch gpucc_sleep_clk = { static struct gdsc gpu_cx_gdsc = { .gdscr = 0x106c, .gds_hw_ctrl = 0x1540, + .clk_dis_wait_val = 8, .pd = { .name = "gpu_cx_gdsc", }, |