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authorHoratiu Vultur <[email protected]>2025-05-23 08:27:16 +0000
committerPaolo Abeni <[email protected]>2025-05-28 07:11:19 +0000
commit57a92d14659df3e7e7e0052358c8cc68bbbc3b5e (patch)
treea640ba231def072a1e55bf46391d5b804a92af2a
parentnet: openvswitch: Fix the dead loop of MPLS parse (diff)
downloadkernel-57a92d14659df3e7e7e0052358c8cc68bbbc3b5e.tar.gz
kernel-57a92d14659df3e7e7e0052358c8cc68bbbc3b5e.zip
net: phy: mscc: Stop clearing the the UDPv4 checksum for L2 frames
We have noticed that when PHY timestamping is enabled, L2 frames seems to be modified by changing two 2 bytes with a value of 0. The place were these 2 bytes seems to be random(or I couldn't find a pattern). In most of the cases the userspace can ignore these frames but if for example those 2 bytes are in the correction field there is nothing to do. This seems to happen when configuring the HW for IPv4 even that the flow is not enabled. These 2 bytes correspond to the UDPv4 checksum and once we don't enable clearing the checksum when using L2 frames then the frame doesn't seem to be changed anymore. Fixes: 7d272e63e0979d ("net: phy: mscc: timestamping and PHC support") Signed-off-by: Horatiu Vultur <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Paolo Abeni <[email protected]>
-rw-r--r--drivers/net/phy/mscc/mscc_ptp.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/mscc_ptp.c
index 6f96f2679f0b..6b800081eed5 100644
--- a/drivers/net/phy/mscc/mscc_ptp.c
+++ b/drivers/net/phy/mscc/mscc_ptp.c
@@ -946,7 +946,9 @@ static int vsc85xx_ip1_conf(struct phy_device *phydev, enum ts_blk blk,
/* UDP checksum offset in IPv4 packet
* according to: https://tools.ietf.org/html/rfc768
*/
- val |= IP1_NXT_PROT_UDP_CHKSUM_OFF(26) | IP1_NXT_PROT_UDP_CHKSUM_CLEAR;
+ val |= IP1_NXT_PROT_UDP_CHKSUM_OFF(26);
+ if (enable)
+ val |= IP1_NXT_PROT_UDP_CHKSUM_CLEAR;
vsc85xx_ts_write_csr(phydev, blk, MSCC_ANA_IP1_NXT_PROT_UDP_CHKSUM,
val);