diff options
| author | Hector Palacios <[email protected]> | 2025-07-04 09:41:09 +0000 |
|---|---|---|
| committer | Miquel Raynal <[email protected]> | 2025-07-30 09:27:30 +0000 |
| commit | 125100566b8f830365a85930d85134f7dba3b99b (patch) | |
| tree | fc184f4b5562f1507c0bda3bdb29e25f036ccc63 | |
| parent | mtd: rawnand: atmel: Fix dma_mapping_error() address (diff) | |
| download | kernel-125100566b8f830365a85930d85134f7dba3b99b.tar.gz kernel-125100566b8f830365a85930d85134f7dba3b99b.zip | |
mtd: rawnand: hynix: don't try read-retry on SLC NANDs
Some SLC NANDs like H27U4G8F2D expose a valid JEDEC ID yet they don't
support the read-retry mechanism, and fail.
Since SLC NANDs don't require read-retry, continue only if the bits per
cell is bigger than 1.
Signed-off-by: Hector Palacios <[email protected]>
Signed-off-by: Miquel Raynal <[email protected]>
| -rw-r--r-- | drivers/mtd/nand/raw/nand_hynix.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/mtd/nand/raw/nand_hynix.c b/drivers/mtd/nand/raw/nand_hynix.c index c02e50608816..b663659b2f49 100644 --- a/drivers/mtd/nand/raw/nand_hynix.c +++ b/drivers/mtd/nand/raw/nand_hynix.c @@ -377,9 +377,9 @@ static int hynix_nand_rr_init(struct nand_chip *chip) /* * We only support read-retry for 1xnm NANDs, and those NANDs all - * expose a valid JEDEC ID. + * expose a valid JEDEC ID. SLC NANDs don't require read-retry. */ - if (valid_jedecid) { + if (valid_jedecid && nanddev_bits_per_cell(&chip->base) > 1) { u8 nand_tech = chip->id.data[5] >> 4; /* 1xnm technology */ |