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| author | Wolfram Sang <[email protected]> | 2021-03-11 09:29:37 +0000 |
|---|---|---|
| committer | Geert Uytterhoeven <[email protected]> | 2021-03-12 08:23:24 +0000 |
| commit | 0eedab655ec1817d450085dcb12219726cb415ff (patch) | |
| tree | 6b7d6acc99ccc60d3c0e6121e3ad6b4b24981668 | |
| parent | clk: renesas: r8a7795: Add TMU clocks (diff) | |
| download | kernel-0eedab655ec1817d450085dcb12219726cb415ff.tar.gz kernel-0eedab655ec1817d450085dcb12219726cb415ff.zip | |
clk: renesas: r8a779a0: Add CMT clocks
Signed-off-by: Wolfram Sang <[email protected]>
Link: https://lore.kernel.org/r/[email protected]
Signed-off-by: Geert Uytterhoeven <[email protected]>
| -rw-r--r-- | drivers/clk/renesas/r8a779a0-cpg-mssr.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/drivers/clk/renesas/r8a779a0-cpg-mssr.c b/drivers/clk/renesas/r8a779a0-cpg-mssr.c index 12607a793143..867c565cb58f 100644 --- a/drivers/clk/renesas/r8a779a0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779a0-cpg-mssr.c @@ -233,6 +233,10 @@ static const struct mssr_mod_clk r8a779a0_mod_clks[] __initconst = { DEF_MOD("vspd0", 830, R8A779A0_CLK_S3D1), DEF_MOD("vspd1", 831, R8A779A0_CLK_S3D1), DEF_MOD("rwdt", 907, R8A779A0_CLK_R), + DEF_MOD("cmt0", 910, R8A779A0_CLK_R), + DEF_MOD("cmt1", 911, R8A779A0_CLK_R), + DEF_MOD("cmt2", 912, R8A779A0_CLK_R), + DEF_MOD("cmt3", 913, R8A779A0_CLK_R), DEF_MOD("pfc0", 915, R8A779A0_CLK_CP), DEF_MOD("pfc1", 916, R8A779A0_CLK_CP), DEF_MOD("pfc2", 917, R8A779A0_CLK_CP), |