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authorWei Fang <[email protected]>2025-07-11 09:16:38 +0000
committerJakub Kicinski <[email protected]>2025-07-15 00:14:31 +0000
commit2d33dc6058157d91c5b76b7380bbc27d72595d2c (patch)
treec31f53ea9cd4d49270e4897d0970cf475c7994a4
parentnet: fec: use phy_interface_mode_is_rgmii() to check RGMII mode (diff)
downloadkernel-2d33dc6058157d91c5b76b7380bbc27d72595d2c.tar.gz
kernel-2d33dc6058157d91c5b76b7380bbc27d72595d2c.zip
net: fec: add more macros for bits of FEC_ECR
There are also some RCR bits that are not defined but are used by the driver, so add macro definitions for these bits to improve readability and maintainability. In addition, although FEC_RCR_HALFDPX has been defined, it is not used in the driver. According to the description of FEC_RCR[1] in RM, it is used to disable receive on transmit. Therefore, it is more appropriate to redefine FEC_RCR[1] as FEC_RCR_DRT. Signed-off-by: Wei Fang <[email protected]> Reviewed-by: Maxime Chevallier <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Jakub Kicinski <[email protected]>
-rw-r--r--drivers/net/ethernet/freescale/fec_main.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index f4f1f38d94eb..00f8be4119ed 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -279,13 +279,15 @@ MODULE_PARM_DESC(macaddr, "FEC Ethernet MAC address");
#define FEC_ECR_BYTESWP BIT(8)
/* FEC RCR bits definition */
#define FEC_RCR_LOOP BIT(0)
-#define FEC_RCR_HALFDPX BIT(1)
+#define FEC_RCR_DRT BIT(1)
#define FEC_RCR_MII BIT(2)
#define FEC_RCR_PROMISC BIT(3)
#define FEC_RCR_BC_REJ BIT(4)
#define FEC_RCR_FLOWCTL BIT(5)
+#define FEC_RCR_RGMII BIT(6)
#define FEC_RCR_RMII BIT(8)
#define FEC_RCR_10BASET BIT(9)
+#define FEC_RCR_NLC BIT(30)
/* TX WMARK bits */
#define FEC_TXWMRK_STRFWD BIT(8)
@@ -1131,7 +1133,7 @@ fec_restart(struct net_device *ndev)
{
struct fec_enet_private *fep = netdev_priv(ndev);
u32 temp_mac[2];
- u32 rcntl = OPT_FRAME_SIZE | 0x04;
+ u32 rcntl = OPT_FRAME_SIZE | FEC_RCR_MII;
u32 ecntl = FEC_ECR_ETHEREN;
if (fep->bufdesc_ex)
@@ -1162,7 +1164,7 @@ fec_restart(struct net_device *ndev)
writel(0x04, fep->hwp + FEC_X_CNTRL);
} else {
/* No Rcv on Xmit */
- rcntl |= 0x02;
+ rcntl |= FEC_RCR_DRT;
writel(0x0, fep->hwp + FEC_X_CNTRL);
}
@@ -1191,11 +1193,11 @@ fec_restart(struct net_device *ndev)
*/
if (fep->quirks & FEC_QUIRK_ENET_MAC) {
/* Enable flow control and length check */
- rcntl |= 0x40000000 | 0x00000020;
+ rcntl |= FEC_RCR_NLC | FEC_RCR_FLOWCTL;
/* RGMII, RMII or MII */
if (phy_interface_mode_is_rgmii(fep->phy_interface))
- rcntl |= (1 << 6);
+ rcntl |= FEC_RCR_RGMII;
else if (fep->phy_interface == PHY_INTERFACE_MODE_RMII)
rcntl |= FEC_RCR_RMII;
else